Patents by Inventor Dropps

Dropps has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8995425
    Abstract: Methods and systems for a network device are provided. The network device includes a stage one arbiter for a base-port for determining if there are any pending requests; blocking any other requests from a same receive queue destined for a same sub-port, same physical transmit queue, and same virtual transmit queue when there are any pending requests; selecting a group of requests with a highest priority and available resources; selecting at least two of the highest priority requests; selecting an oldest one of the requests having the same priority when there are requests with a same priority; sending the selected requests to a stage two arbiter for the base-port; and determining if any new requests have been made or if any previously pending requests have been removed.
    Type: Grant
    Filed: November 15, 2012
    Date of Patent: March 31, 2015
    Assignee: QLOGIC, Corporation
    Inventors: Frank R. Dropps, Gary M. Papenfuss, Leo J. Slechta, Jr.
  • Patent number: 8995455
    Abstract: One method includes: (a) providing a memory storage device having a plurality of storage locations for storing information received by a plurality of sub-ports of a base port of the network device, where the memory storage device is shared among the plurality of sub-ports such that each sub-port is given access to the memory storage device at a certain phase of a system clock cycle; (b) storing a packet or a portion thereof at one of the storage locations when a sub-port that receives the packet has access to one or more of the storage locations; and (c) scrambling addresses for the memory storage locations such that a different one of the storage location is available to the sub-port of step (b) for a next write operation in a next phase when the sub-port of step (b) is given access to the memory storage device.
    Type: Grant
    Filed: November 15, 2012
    Date of Patent: March 31, 2015
    Assignee: QLOGIC, Corporation
    Inventors: Frank R. Dropps, Craig M. Verba
  • Patent number: 8995457
    Abstract: Methods and systems for a network device are provided. The network device includes a plurality of base-ports, where each base-port is coupled to a plurality of network links and each base-port has a plurality of sub-ports. The network device includes a transmit segment having a modifier shared by the plurality of sub-ports for modifying frames that are modified prior to being transmitted using the plurality of network links. The modifier uses a translation data structure to obtain information to modify a frame before transmission, where the translation data structure includes a plurality of entries, each entry stored in a queue that is uniquely identified by an identifier, and the identifier is extracted from a grant to transmit the frame and then used to obtain frame modification information from one of the plurality of entries. Frame modification when performed by the modifier depends on a frame type and sub-port configuration.
    Type: Grant
    Filed: November 15, 2012
    Date of Patent: March 31, 2015
    Assignee: QLOGIC, Corporation
    Inventors: Frank R. Dropps, Gary M. Papenfuss, William J. Andersen
  • Patent number: 8989191
    Abstract: Method and system for a network device configured to control access to other devices in a network is provided. The network device includes a port configured to receive a frame. The port includes a plurality of sub-ports configured to operate as independent ports for sending and receiving frames using one of a plurality of network links at a plurality of rates and complying with a plurality of protocols. The network device also includes a source address look up table (ALUT) and a destination address look up table (LLUT), wherein when the frame is received the network device is configured to compare a source identifier of the frame and a destination identifier of the frame to the ALUT and the LLUT. When one ALUT table entry matches the source identifier of the frame, the network device outputs a bit map of zones based on the source identifier of the frame, compares the output bit map of zones with a zone bit map of the LLUT, and when there are any matching bits between the two maps, transmits the frame.
    Type: Grant
    Filed: November 15, 2012
    Date of Patent: March 24, 2015
    Assignee: QLOGIC, Corporation
    Inventors: Frank R. Dropps, Gary M. Papenfuss
  • Patent number: 8976800
    Abstract: A switching element and methods thereof are provided. The switching element includes a port from among a plurality of ports, which when configured to operate as a network protocol port sends and receives network information and when configured to operate as a storage protocol port sends and receives storage information. The port includes a control segment for generating a control signal for setting an operating mode of a serial and de-serializer (SERDES). The operating mode of the SERDES is selected based on whether the port is configured to operate as a network protocol port or as a storage protocol port.
    Type: Grant
    Filed: February 4, 2013
    Date of Patent: March 10, 2015
    Assignee: QLOGIC, Corporation
    Inventors: Frank R. Dropps, Gary M. Papenfuss
  • Patent number: 8976667
    Abstract: Method and system for maximizing data transmission between a first network device and a second network device connected to a network, is provided. A data transmission pause request received from a port of the first network device by a port of the second network device. The process then determines if the first network device's port can receive additional data; and transmits additional data to the first network device from the second network device if the first network device's port can receive additional data.
    Type: Grant
    Filed: November 15, 2012
    Date of Patent: March 10, 2015
    Assignee: QLOGIC, Corporation
    Inventor: Frank R. Dropps
  • Publication number: 20150054446
    Abstract: Certain configurations of the present disclosure present a PTC starter. The PTC starter includes a housing, a first conductive terminal (6), a second conductive terminal (7), a control PTC thermistor (3), a start PTC thermistor (4) and a TRIAC (5), wherein the control PTC thermistor (3), the start PTC thermistor (4) and the TRIAC (5) being accommodated in the housing, the start PTC thermistor (4) being connected in series with the TRIAC (5), wherein one electrode of the control PTC thermistor (3) is connected with the gate (G) of the TRIAC (5), the control PTC thermistor (3) is connected in series with the start PTC thermistor (4), the volume of the control PTC thermistor (3) is less than 30 mm3, and the distance between the control PTC thermistor (3) and the start PTC thermistor (4) is less than 5 mm.
    Type: Application
    Filed: August 25, 2014
    Publication date: February 26, 2015
    Inventors: Kevin J. Dropps, Leo Zhong, Changyin Wang, Jian Chen
  • Patent number: 8953606
    Abstract: A network device is provided. The network device includes a processor having access to a memory storage device storing instructions for execution by the processor; and a first flexible port having a physical layer that can be configured to operate as a first link type or a second link type based on a control signal sent by the processor. The first flexible port receives a packet from the computing system. The first flexible port determines an egress flexible port for transmitting the packet to its destination. A routing module generates a route control tag for the packet that includes an identifier identifying the egress flexible port, a location identifier identifying where the packet is stored at the first flexible port and a translation identifier identifying an action that is to be performed on the packet at the egress port before sending the packet to the destination.
    Type: Grant
    Filed: March 28, 2012
    Date of Patent: February 10, 2015
    Assignee: QLOGIC, Corporation
    Inventors: Edward C. McGlaughlin, Frank R. Dropps
  • Patent number: 8924764
    Abstract: Method and system for rate matching in networks is provided. The method includes setting a strobe counter of a network device equal to an initial value; and determining whether a current clock phase matches a clock phase during which a first sub-port from among a plurality of sub-ports is designated to read from a memory at a receive segment of the network device. When the current clock phase matches the designated clock phase for the first sub-port, determining if the strobe counter is equal to one of a plurality of mask values; and when the strobe counter is not equal to one of the mask values, reading data out of the memory.
    Type: Grant
    Filed: November 15, 2012
    Date of Patent: December 30, 2014
    Assignee: QLOGIC, Corporation
    Inventors: Frank R. Dropps, Ernest G. Kohlwey
  • Patent number: 8873546
    Abstract: Method and system for a network switch element is provided. The switch element includes a plurality of megaports, each megaport uniquely identified by a unique megaport address identifier for network addressing. Each megaport includes a plurality of operational ports, each operational port identified by a unique operational port address identifier. The switch element also includes a local crossbar for communication between the plurality of operational ports, and a shared logic module configured to provide common control of the plurality of operational ports within a megaport to allow operational ports to share resource of a single megaport to route network packets there between. The switch element also includes a global crossbar configured to allow communication between the megaports.
    Type: Grant
    Filed: October 13, 2011
    Date of Patent: October 28, 2014
    Assignee: QLOGIC, Corporation
    Inventors: James A. Kunz, Frank R. Dropps, Edward C. Ross, Mark A. Owen, Craig M. Verba
  • Patent number: 8774206
    Abstract: A high-speed Fiber Channel switch element in a Fiber Channel network is provided. The Fiber Channel switch element includes, a rate select module that allows a port in the Fiber Channel switch element to operate at a rate equal to and/or higher than 10 gigabits per second (“G”). The port may operate at 20 G, 40 G or at a rate greater than 40 G. Also, a cut status is provided for cut-through routing between ports operating at different speed. Plural transmit and receive lines are used for port operation at a rate equal to or higher than 10 G.
    Type: Grant
    Filed: September 5, 2012
    Date of Patent: July 8, 2014
    Assignee: QLOGIC, Corporation
    Inventors: Frank R. Dropps, Ernest G. Kohlwey, Mark A. Owen
  • Patent number: 8761020
    Abstract: A switch element and a method for routing packets in an IB Multi Level switch and network is provided. The method includes determining if alternate routing is enabled for a packet; determining an alternate route address for the packet, if alternate routing is enabled; and routing the packet using the alternate route address, if the alternate route address is valid. The switch element includes a routing table in a port that determines a base route address; and if alternate routing is enabled for a packet, the port determines an alternate route address for a packet; and routes the packet using the alternate route address.
    Type: Grant
    Filed: September 19, 2011
    Date of Patent: June 24, 2014
    Assignee: Intel Corporation
    Inventors: Frank R. Dropps, Ian G. Colloff, James A. Kunz, Ernest G. Kohlwey
  • Patent number: 8644317
    Abstract: A fiber channel switch element and method for routing fiber channel frames is provided. The switch element includes a receive segment that can add a virtual storage area network (“VSAN”) tagging header to frames that are received by the receive segment; and strip the VSAN tagging header before frames are sent to ports that do not support virtual fabric capability. The receive segment includes a table used for matching fabric extension parameters. An incoming frame's VSAN identity value is compared to a control word entry to generate a value used for routing the incoming frame. The table is used to determine if a frame is part of a virtual fabric. The routing table for each port is used to route frames and the routing table includes entries for supported virtual fabrics.
    Type: Grant
    Filed: July 6, 2011
    Date of Patent: February 4, 2014
    Assignee: QLOGIC, Corporation
    Inventors: Frank R. Dropps, Craig M. Verba, Gary M. Papenfuss, Ernest G. Kohlwey, Edward C. Ross
  • Patent number: 8553696
    Abstract: Method for and system validating a network packet is provided. The method includes receiving a network packet at a port of a network device, the packet including a first indicia value and a second indicia value; comparing the first indicia value of the packet with at least a first value stored at the network device; comparing the second indicia value of the packet with at least a second value stored at the network device; and processing the packet if the first indicia value matches with the first value and the second indicia value matches with the second value; wherein the first indicia value is a partition key that restricts communication between a packet source and at least one destination; and the second indicia value is one or more of a source address and a destination address, where a same physical port of a source is assigned more than one source address.
    Type: Grant
    Filed: March 2, 2011
    Date of Patent: October 8, 2013
    Assignee: Intel Corporation
    Inventor: Frank R. Dropps
  • Publication number: 20130152313
    Abstract: Water-soluble, single unit pouches containing a pre-measured amount of a solid bleaching agent, bleach activating agent, and stain-fighting enzymes that can be added to a volume of water to bleach and/or deodorize laundry or a surface are provided. Water-soluble, single unit pouches containing a pre-measured amount of a solid fabric softening agent and fragrance that can be added to a volume of water to soften a material are provided. Also provided are kits including the pouches, as well as methods for using such pouches for bleaching and/or softening a material or surface.
    Type: Application
    Filed: December 14, 2012
    Publication date: June 20, 2013
    Applicant: Dropps
    Inventor: Dropps
  • Patent number: 8441929
    Abstract: Method for reporting bandwidth loss on a network link that couples a switch element to a network is provided. The method includes determining if credit is unavailable to transmit a packet and a packet is available at a switch port for transmission; determining bandwidth loss due to lack of credit; and reporting the bandwidth loss to a processor of the network switch. The switch element includes a processor for executing firmware code; a port for receiving and transmitting network packets; and a bandwidth loss logic that determines bandwidth loss if credit is unavailable to transmit a packet and the packet is available at the port; and reports the bandwidth loss to the processor.
    Type: Grant
    Filed: February 11, 2011
    Date of Patent: May 14, 2013
    Assignee: QLOGIC, Corporation
    Inventors: Frank R. Dropps, Bret E. Indrelee
  • Publication number: 20130077637
    Abstract: A high-speed Fibre Channel switch element in a Fibre Channel network is provided. The Fibre Channel switch element includes, a rate select module that allows a port in the Fibre Channel switch element to operate at a rate equal to and/or higher than 10 gigabits per second (“G”). The port may operate at 20 G, 40 G or at a rate greater than 40 G. Also, a cut status is provided for cut-through routing between ports operating at different speed. Plural transmit and receive lines are used for port operation at a rate equal to or higher than 10 G.
    Type: Application
    Filed: September 5, 2012
    Publication date: March 28, 2013
    Applicant: QLOGIC, Corporation
    Inventors: Frank R. Dropps, Ernest G. Kohlwey, Mark A. Owen
  • Patent number: 8391300
    Abstract: A switching element and methods thereof are provided. The switching element includes a port from among a plurality of ports, which when configured to operate as a network protocol port sends and receives network information and when configured to operate as a storage protocol port sends and receives storage information. The port includes a control segment for generating a control signal for setting an operating mode of a serial and de-serializer (SERDES). The operating mode of the SERDES is selected based on whether the port is configured to operate as a network protocol port or as a storage protocol port.
    Type: Grant
    Filed: August 11, 2009
    Date of Patent: March 5, 2013
    Assignee: QLOGIC, Corporation
    Inventors: Frank R. Dropps, Gary M. Papenfuss
  • Publication number: 20120327539
    Abstract: Techniques disclosed herein include systems and methods for assembly of electric motor starter connecting packages that enable increased automation and reduced assembly via top-down assembly of circuit components, thereby allowing robotic placement, connection, and securing of circuit components. The connecting package can include an electric motor starter, with optional overload protector, packaged as one unit. The motor starter can include an electrical circuit containing a triac, current transformer, Positive Temperature Coefficient (PTC) element, resistor, and a capacitor. A cover and base of the connecting package enclose and firmly secure connected circuit elements without needing a circuit board or filler material. The device design enables quick testing of the motor starter circuit and circuit elements after being enclosed by the housing.
    Type: Application
    Filed: June 22, 2012
    Publication date: December 27, 2012
    Inventors: Keith Washburn, Christian V. Pellon, Kevin Dropps, Mark C. Carlos, Daniel Quinn
  • Patent number: 8295299
    Abstract: A high-speed Fiber Channel switch element in a Fiber Channel network is provided. The Fiber Channel switch element includes, a rate select module that allows a port in the Fiber Channel switch element to operate at a rate equal to and/or higher than 10 gigabits per second (“G”). The port may operate at 20G, 40G or at a rate greater than 40G. Also, a cut status is provided for cut-through routing between ports operating at different speed. Plural transmit and receive lines are used for port operation at a rate equal to or higher than 10G.
    Type: Grant
    Filed: October 1, 2004
    Date of Patent: October 23, 2012
    Assignee: QLOGIC, Corporation
    Inventors: Frank R. Dropps, Ernest G. Kohlwey, Mark A. Owen