Patents by Inventor Dror Zalstein
Dror Zalstein has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20250021229Abstract: In at least one embodiment, processing can include: receiving, at a first node, a read operation that reads content of a logical address, wherein a second node, but not the first node, owns the logical address; and performing optimized read processing for the read operation. The optimized read processing can include: performing, in parallel, first processing that obtains a first address hint and first content corresponding to the logical address, and second processing that obtains a second address hint corresponding to the logical address; determining whether the first and second address hints match; if the first and second address hints match, determining that first content is valid content stored at the target logical address; if the first and second address hints do not match, determining the first content is not stored at the logical address, and using the second address hint to obtain second content stored at the logical address.Type: ApplicationFiled: July 12, 2023Publication date: January 16, 2025Applicant: Dell Products L.P.Inventors: Vladimir Shveidel, Nimrod Shani, Dror Zalstein
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Patent number: 12197728Abstract: In at least one embodiment, processing can include: receiving, at a first node, a read operation that reads content of a logical address, wherein a second node, but not the first node, owns the logical address; and performing optimized read processing for the read operation. The optimized read processing can include: performing, in parallel, first processing that obtains a first address hint and first content corresponding to the logical address, and second processing that obtains a second address hint corresponding to the logical address; determining whether the first and second address hints match; if the first and second address hints match, determining that first content is valid content stored at the target logical address; if the first and second address hints do not match, determining the first content is not stored at the logical address, and using the second address hint to obtain second content stored at the logical address.Type: GrantFiled: July 12, 2023Date of Patent: January 14, 2025Assignee: Dell Products L.P.Inventors: Vladimir Shveidel, Nimrod Shani, Dror Zalstein
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Publication number: 20240403227Abstract: Logical address space portions and virtual layer blocks (VLBs) can be partitioned into multiple sets. Each of multiple nodes in a system can be assigned exclusive ownership of one of the multiple sets. In at least one embodiment, for a read I/O which is received at a first node and directed to a logical address LA1 that is owned by a second node, the first node can request that the second owning node perform resolution processing for LA1. The second node can return either a VLB address or a PLB address based on whether the second node owns a VLB used in mapping LA1 to a corresponding physical location PA1 which includes content C1 stored at LA1. The second node can set a flag in its response to indicate whether a returned address is a VLB address or a PLB address.Type: ApplicationFiled: August 12, 2024Publication date: December 5, 2024Applicant: Dell Products L.P.Inventors: Vladimir Shveidel, Uri Shabi, Dror Zalstein
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Patent number: 12141065Abstract: In at least one embodiment, processing can include determining, by a first node, an update to a metadata (MD) page, wherein the first node includes a first cache; sending, from the first node to a second node, a commit message including the update to the MID page; receiving, at the second node, the commit message from the first node; and storing, by the second node, an updated version of the MID page in a second cache of the second node only if the second cache of the second node includes a cached copy of the MD page, wherein the updated version of the MID page, as stored in the second cache of the second node, is constructed by applying the first update to the cached copy of the first MD page.Type: GrantFiled: March 1, 2023Date of Patent: November 12, 2024Assignee: Dell Products L.P.Inventors: Ami Sabo, Vladimir Shveidel, Dror Zalstein
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Publication number: 20240370193Abstract: In at least one embodiment, processing can include: receiving metadata updates for MD pages; recording the MD updates for the MD pages in a MD log; and performing a first destaging phase that writes the MD updates from the MD log to a tablet stored on non-volatile storage. The tablet can include a bucket area and an extension area. The bucket area can include buckets each of which is a predetermined bucket size. The first destaging phase can include: writing a portion of the MD updates from the MD log to the bucket area; and writing a second portion of the MD updates from the MD log to the extension area. Each MD update of the second portion can overflow a corresponding one of the buckets which is included in the bucket area and which is associated with one of the MD pages updated by the MD update.Type: ApplicationFiled: May 1, 2023Publication date: November 7, 2024Applicant: Dell Products L.P.Inventors: Jenny Derzhavetz, Vladimir Shveidel, Dror Zalstein
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Publication number: 20240330204Abstract: Logical address space portions and virtual layer blocks (VLBs) can be partitioned into multiple sets. Each of multiple nodes in a system can be assigned exclusive ownership of one of the multiple sets. In at least one embodiment, for a read I/O which is received at a first node and directed to a logical address LA1 that is owned by a second node, the first node can request that the second owning node perform resolution processing for LA1. The second node can return either a VLB address or a PLB address based on whether the second node owns a VLB used in mapping LA1 to a corresponding physical location PA1 which includes content C1 stored at LA1. The second node can set a flag in its response to indicate whether a returned address is a VLB address or a PLB address.Type: ApplicationFiled: March 31, 2023Publication date: October 3, 2024Applicant: Dell Products L.P.Inventors: Vladimir Shveidel, Uri Shabi, Dror Zalstein
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Publication number: 20240320098Abstract: A searchable metadata change log is maintained in a persistent memory of a data storage system, and stores metadata changes to be aggregated and applied to data storage system metadata located in non-volatile data storage. New metadata changes are added to the metadata change log by storing the new metadata changes into the persistent memory, storing structural modifications to the metadata change log needed to add the new metadata changes to the metadata change log into a transaction entry located in the persistent memory, and processing the resulting transaction entry to perform the structural modifications to the metadata change log that were stored in the transaction entry.Type: ApplicationFiled: March 23, 2023Publication date: September 26, 2024Inventors: Dror Zalstein, Vladimir Shveidel, Jenny Derzhavetz
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Patent number: 12093187Abstract: Logical address space portions and virtual layer blocks (VLBs) can be partitioned into multiple sets. Each of multiple nodes in a system can be assigned exclusive ownership of one of the multiple sets. In at least one embodiment, for a read I/O which is received at a first node and directed to a logical address LA1 that is owned by a second node, the first node can request that the second owning node perform resolution processing for LA1. The second node can return either a VLB address or a PLB address based on whether the second node owns a VLB used in mapping LA1 to a corresponding physical location PA1 which includes content C1 stored at LA1. The second node can set a flag in its response to indicate whether a returned address is a VLB address or a PLB address.Type: GrantFiled: March 31, 2023Date of Patent: September 17, 2024Assignee: Dell Products L.P.Inventors: Vladimir Shveidel, Uri Shabi, Dror Zalstein
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Publication number: 20240296123Abstract: In at least one embodiment, processing can include determining, by a first node, an update to a metadata (MD) page, wherein the first node includes a first cache; sending, from the first node to a second node, a commit message including the update to the MID page; receiving, at the second node, the commit message from the first node; and storing, by the second node, an updated version of the MID page in a second cache of the second node only if the second cache of the second node includes a cached copy of the MD page, wherein the updated version of the MID page, as stored in the second cache of the second node, is constructed by applying the first update to the cached copy of the first MD page.Type: ApplicationFiled: March 1, 2023Publication date: September 5, 2024Applicant: Dell Products LP.Inventors: Ami Sabo, Vladimir Shveidel, Dror Zalstein
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Patent number: 11921695Abstract: In a dual node system, each node can store metadata updates in a volatile memory metadata log. Metadata pages can be used to access data stored on a volume. A node designated as preferred or affined for a volume can be expected to receive I/Os directed to the volume. A preferred node for a volume can record, in its volatile memory metadata log, the metadata changes for the metadata pages used to access data stored on the volume. A non-preferred or non-affined node for the volume can infrequently receive I/Os directed to the volume. A non-preferred node for a volume can record, in its volatile memory metadata log, pointers or references to the metadata changes for the metadata pages used to access data stored on the volume, where the pointers or references map to persisted copies of the meta changes as stored in a persisted metadata log.Type: GrantFiled: October 5, 2021Date of Patent: March 5, 2024Assignee: Dell Products L.P.Inventors: Bar David, Dror Zalstein, Vladimir Shveidel
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Patent number: 11899630Abstract: A method, computer program product, and computer system for controlling, by a computing device, access to a non-volatile memory using a non-volatile lock as a reader of the non-volatile memory. Metadata (MD) non-volatile memory commits may be throttled until capacity of the non-volatile memory is at a threshold capacity.Type: GrantFiled: April 23, 2021Date of Patent: February 13, 2024Assignee: EMC IP Holding Company, LLCInventors: Ami Sabo, Vladimir Shveidel, Dror Zalstein
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Patent number: 11886427Abstract: In at least one embodiment, processing can include: receiving a request for a transaction of MD (metadata) updates including a first MD update of a first MD update type of a first set and including a second MD update of a second MD update type of a second set; storing, in a first volatile MD log, the first MD update; storing, in a second volatile MD log, the second MD update; storing, in a first non-volatile MD log, the first MD update; and storing, in a second non-volatile MD log, the second MD update, wherein each MD update of the first volatile MD log and the first non-volatile MD log has a corresponding MD update type of the first set, and each MD update of the second volatile MD log and the second non-volatile MD log has a corresponding MD update type of the second set.Type: GrantFiled: October 3, 2022Date of Patent: January 30, 2024Assignee: Dell Products L.P.Inventors: Vladimir Shveidel, Dror Zalstein, Bar David
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Publication number: 20230106982Abstract: In a dual node system, each node can store metadata updates in a volatile memory metadata log. Metadata pages can be used to access data stored on a volume. A node designated as preferred or affined for a volume can be expected to receive I/Os directed to the volume. A preferred node for a volume can record, in its volatile memory metadata log, the metadata changes for the metadata pages used to access data stored on the volume. A non-preferred or non-affined node for the volume can infrequently receive I/Os directed to the volume. A non-preferred node for a volume can record, in its volatile memory metadata log, pointers or references to the metadata changes for the metadata pages used to access data stored on the volume, where the pointers or references map to persisted copies of the meta changes as stored in a persisted metadata log.Type: ApplicationFiled: October 5, 2021Publication date: April 6, 2023Applicant: Dell Products L.P.Inventors: Bar David, Dror Zalstein, Vladimir Shveidel
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Patent number: 11615028Abstract: A method, computer program product, and computing system for receiving a flush request for a metadata page stored in a storage array of a multi-node storage system. The flush request may be queued on a flush request lock queue on at least one node of the multi-node storage system. One or more flush requests may be processed, via multiple nodes of the multi-node storage system, on the metadata page based upon, at least in part, the flush request lock queue.Type: GrantFiled: April 22, 2021Date of Patent: March 28, 2023Assignee: EMC IP Holding Company, LLCInventors: Jenny Derzhavetz, Vladimir Shveidel, Dror Zalstein, Bar David
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Patent number: 11599460Abstract: A method, computer program product, and computing system for assigning a plurality of unique sequential identifiers to a plurality of tablets in a cache memory system. One or more metadata deltas associated with a metadata page stored in a storage array may be written to the plurality of tablets in the cache memory system. Each metadata delta stored in at least one tablet of the plurality of tablets may be written to the metadata page stored in the storage array, thus defining one or more destage tablets. A largest unique sequential identifier from the plurality of unique sequential identifiers assigned to the one or more destage tablets, may be written to the storage array, thus defining a current tablet identifier for the metadata page.Type: GrantFiled: April 22, 2021Date of Patent: March 7, 2023Assignee: EMC IP Holding Company, LLCInventors: Jenny Derzhavetz, Vladimir Shveidel, Dror Zalstein, Bar David
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Publication number: 20220342816Abstract: A method, computer program product, and computing system for assigning a plurality of unique sequential identifiers to a plurality of tablets in a cache memory system. One or more metadata deltas associated with a metadata page stored in a storage array may be written to the plurality of tablets in the cache memory system. Each metadata delta stored in at least one tablet of the plurality of tablets may be written to the metadata page stored in the storage array, thus defining one or more destage tablets. A largest unique sequential identifier from the plurality of unique sequential identifiers assigned to the one or more destage tablets, may be written to the storage array, thus defining a current tablet identifier for the metadata page.Type: ApplicationFiled: April 22, 2021Publication date: October 27, 2022Inventors: Jenny Derzhavetz, Vladimir Shveidel, Dror Zalstein, Bar David
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Publication number: 20220342855Abstract: A method, computer program product, and computer system for controlling, by a computing device, access to a non-volatile memory using a non-volatile lock as a reader of the non-volatile memory. Metadata (MD) non-volatile memory commits may be throttled until capacity of the non-volatile memory is at a threshold capacity.Type: ApplicationFiled: April 23, 2021Publication date: October 27, 2022Inventors: Ami Sabo, Vladimir Shveidel, Dror Zalstein
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Publication number: 20220342825Abstract: A method, computer program product, and computing system for receiving a flush request for a metadata page stored in a storage array of a multi-node storage system. The flush request may be queued on a flush request lock queue on at least one node of the multi-node storage system. One or more flush requests may be processed, via multiple nodes of the multi-node storage system, on the metadata page based upon, at least in part, the flush request lock queue.Type: ApplicationFiled: April 22, 2021Publication date: October 27, 2022Inventors: Jenny Derzhavetz, Vladimir Shveidel, Dror Zalstein, Bar David
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Patent number: 11467963Abstract: A method, computer program product, and computing system for receiving, at a node of a multi-node storage system, one or more updates to a reference count associated with a metadata block. One or more reference count deltas associated with the metadata block may be stored in a cache memory system of the node. An existing copy of the metadata block in a cache memory system of each other node of the multi-node storage system may be retained.Type: GrantFiled: October 12, 2020Date of Patent: October 11, 2022Assignee: EMC IP HOLDING COMPANY, LLCInventors: Bar David, Bar Harel, Dror Zalstein
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Publication number: 20220114100Abstract: A method, computer program product, and computing system for receiving, at a node of a multi-node storage system, one or more updates to a reference count associated with a metadata block. One or more reference count deltas associated with the metadata block may be stored in a cache memory system of the node. An existing copy of the metadata block in a cache memory system of each other node of the multi-node storage system may be retained.Type: ApplicationFiled: October 12, 2020Publication date: April 14, 2022Inventors: Bar David, Bar Harel, Dror Zalstein