Abstract: A method of performing a write operation, the method comprising: comparing a data pattern of a currently received command directing a write operation to data patterns of at least one previously received command; and performing a write operation, based on the currently received command directing the write operation, by writing the data patterns of the at least one previously received command instead of the data pattern of the currently received command when the data pattern of the currently received command directing the write operation is identical to the data patterns of the at least one previously received command

Abstract: A nonvolatile memory device includes user blocks and reserved blocks. A ratio of the number of used reserved blocks among the reserved blocks during a predetermined period to an operation count during the predetermined period is calculated by a memory controller and an end of lifetime warning signal is transmitted to an external device based on the calculated ratio. Bad blocks among the user blocks are replaced by one or more of the reserved blocks. If at least one block among the user blocks becomes a bad block, the memory controller replaces the bad block with any one of the reserved blocks, and the reserved block used indicates a reserved block replaced with at least one of the user blocks. The operation count can be an erase count or a program count of the nonvolatile memory device, or a time count indicating usage time.

Abstract: A storage device includes one or more nonvolatile memories, and a memory controller that controls the nonvolatile memories such that write data of data streams is stored in the nonvolatile memories. The data streams have a first number of requested stream identifiers provided from a host. The memory controller includes a write amount manager that manages information about a data amount of each of the data streams having the requested stream identifiers, a stream manager that maps the first number of the requested stream identifiers with a second number of processing stream identifiers, depending on the information associated with the data amount, such that the data streams are provided to the nonvolatile memories according to the second number of processing stream identifiers, and a mapping manager that manages information about mapping between the first number of the requested stream identifiers and the second number of the processing stream identifiers.

Abstract: A method of performing a write operation, the method comprising: comparing a data pattern of a currently received command directing a write operation to data patterns of at least one previously received command; and performing a write operation, based on the currently received command directing the write operation, by writing the data patterns of the at least one previously received command instead of the data pattern of the currently received command when the data pattern of the currently received command directing the write operation is identical to the data patterns of the at least one previously received command

Abstract: A storage device includes one or more nonvolatile memories, and a memory controller that controls the nonvolatile memories such that write data of data streams is stored in the nonvolatile memories. The data streams have a first number of requested stream identifiers provided from a host. The memory controller includes a write amount manager that manages information about a data amount of each of the data streams having the requested stream identifiers, a stream manager that maps the first number of the requested stream identifiers with a second number of processing stream identifiers, depending on the information associated with the data amount, such that the data streams are provided to the nonvolatile memories according to the second number of processing stream identifiers, and a mapping manager that manages information about mapping between the first number of the requested stream identifiers and the second number of the processing stream identifiers.

Abstract: A method of managing a storage area of a memory device in a memory system is provided. A first data is received. The first data has a logical address to be written to the memory device having a plurality of memory blocks. The first data is classified into one of a hot data and a cold data based on an update frequency of the first data. A memory block is defined into a first storage area and a second storage area based on an amount of charge loss of a memory cell in the memory block. A memory cell of the first storage area has charge loss greater than a memory cell of the second storage area. The logical address of the first data is converted to a physical address of the memory device according to a result of the classifying of the first data. The first data is written to a memory cell having the physical address of the memory device.

Abstract: A memory controller controls a nonvolatile memory device including a plurality of user blocks and a plurality of reserved blocks. A ratio of the number of used reserved blocks among the reserved blocks during a predetermined period to an operation count during the predetermined period is calculated and an end of lifetime warning signal to an external device based on the calculated ratio is transmitted. Bad blocks among the user blocks are replaced by one or more of the reserved blocks If at least one block among the user blocks becomes a bad block, the memory controller replaces the bad block with any one of the reserved blocks, and the reserved block used indicates a reserved block replaced with at least one of the user blocks. The operation count can be, for example, an erase count of the nonvolatile memory device, a program count of the nonvolatile memory device, and/or a time count indicating usage time.

Abstract: A method of controlling a non-volatile memory device having multiple planes including receiving write requests from a host, the write requests each including a logical address, a write command, and a data set; storing the data sets at an address of a buffer; storing the buffer address in a mapping table that maps addresses of the buffer to the multiple planes; sequentially transmitting the data sets stored at respective buffer addresses to page buffers, respectively, of the planes corresponding to the buffer addresses according to the mapping table; and programming in parallel at least two data sets stored in respective page buffers to memory cells of the non-volatile memory device.

Abstract: A method of controlling a non-volatile memory device having multiple planes including receiving write requests from a host, the write requests each including a logical address, a write command, and a data set; storing the data sets at an address of a buffer; storing the buffer address in a mapping table that maps addresses of the buffer to the multiple planes; sequentially transmitting the data sets stored at respective buffer addresses to page buffers, respectively, of the planes corresponding to the buffer addresses according to the mapping table; and programming in parallel at least two data sets stored in respective page buffers to memory cells of the non-volatile memory device.

Abstract: A memory system is operated by maintaining a queue of memory commands to be executed, maintaining a list of previously executed memory commands, comparing local information associated with the commands to be executed with local information associated with the list of previously executed commands, and selecting one of the commands for execution from the queue of memory commands to be executed based on a result of the comparison.

Abstract: A flash memory apparatus includes a flash memory and a control unit for controlling the flash memory. The flash memory includes multiple blocks, each block of the multiple blocks corresponding to multiple word lines, and each word line of the multiple word lines corresponding to a first bit page and at least one second bit page. The control unit is configured to map a logic address included in a host's write request received from a host to a first process page of multiple in a first process block of the multiple blocks, and to program the first process page. The first process page is only the first bit page.

Abstract: A memory system is operated by maintaining a queue of memory commands to be executed, maintaining a list of previously executed memory commands, comparing local information associated with the commands to be executed with local information associated with the list of previously executed commands, and selecting one of the commands for execution from the queue of memory commands to be executed based on a result of the comparison.

Abstract: A memory system is operated by maintaining a queue of memory commands to be executed, maintaining a list of previously executed memory commands, comparing local information associated with the commands to be executed with local information associated with the list of previously executed commands, and selecting one of the commands for execution from the queue of memory commands to be executed based on a result of the comparison.

Abstract: A memory controller includes a microprocessor, a queue configured to store a plurality of first commands provided by the microprocessor, a queue management block configured to interpret and control said plurality of first commands, and a command generator configured to provide a plurality of second commands under control of the queue management block. The queue management block may simultaneously perform the plurality of second commands so as to simultaneously access a plurality of non-volatile memory units.

Abstract: A memory system is operated by maintaining a queue of memory commands to be executed, maintaining a list of previously executed memory commands, comparing local information associated with the commands to be executed with local information associated with the list of previously executed commands, and selecting one of the commands for execution from the queue of memory commands to be executed based on a result of the comparison.