Abstract: A micro device includes a securing layer, a plurality of micro device units that are separated from each other and that are spaced apart from the securing layer, and a connecting layer that interconnects the micro device units in at least one group of two or more and that is connected to the securing layer so that the micro device units are connected to the securing layer through the connecting layer. A method of making the micro device is also provided.

Abstract: A method of switching between first and second states of a van der Waals heterostructure, vdWH, memory device, a vdWH memory device, and a method of fabricating a vdWH memory device. The vdWH memory device comprises a first two-dimensional, 2D, material; and a second 2D material, wherein, in a first storage state of the memory device, an interface between the first and second 2D material comprises interfacial states; and wherein, in a second storage state of the memory device, interfacial states are modulated compared to the first memory state.

Abstract: A method of switching between first and second states of a van der Waals heterostructure, vdWH, memory device, a vdWH memory device, and a method of fabricating a vdWH memory device. The vdWH memory device comprises a first two-dimensional, 2D, material; and a second 2D material, wherein, in a first storage state of the memory device, an interface between the first and second 2D material comprises interfacial states; and wherein, in a second storage state of the memory device, interfacial states are modulated compared to the first memory state.

Abstract: A light emitting diode includes an n-type confinement layer, a quantum well active layer formed on the n-type confinement layer, a p-type confinement layer formed on the quantum well active layer, a gallium phosphide-based quantum dot structure formed in the p-type confinement layer, and a GaP-based current spreading layer formed on the GaP-based quantum dot structure. A method of manufacturing the light emitting diode is also provided.

Abstract: An epitaxial wafer structure of light-emitting diode includes, from bottom to up, a substrate, an N-type GaN layer, a MQW light-emitting layer and a P-type GaN layer, in which, at least one InyGa1?yN/AlN composition layer (0<y?1) is inserted in the N-type GaN and at least one multi-layer AlN/InzGa1?zN composition layer (0<z?1) is inserted in the P-type GaN layer; and AlN part in the inserting layer increases barrier to form a blocking layer and the InyGa1?yN layer reduces barrier to form a carrier capture layer so as to generate two-dimensional electron gas of higher concentration and more-concentrated distribution in the N-type GaN layer and the P-type GaN layer, thereby improving current spreading capacity.

Abstract: A method of fabricating a light-emitting diode includes: proving a substrate; forming an N-type layer, a low-temperature AlxInyGa1?x?yN (0?x?1, 0?y?1, x and y cannot both be zero at the same time) layer, a multiple quantum-well active region, an AlzGa1?zN (0?z?1) electron blocking layer, an AlxInyGa1?x?yN (0?x?1, 0?y?1) separation layer and a P-type layer over the substrate in successive; before growth of the multiple quantum-well active region, growing a low-temperature AlxInyGa1?x?yN layer to form a “V”-shaped indentation or pit; after growth of the multiple quantum-well active region, growing a thin AlzGa1?zN electron blocking layer and then a separation layer under two-dimensional growth mode to form holes between the active region and the P-type layer to separate throughout dislocation within the V pit coverage range and contact with the P-type layer, thus eliminating current leakage and improving inverse current leakage capacity and anti-static capacity of the epitaxial wafer.

Abstract: A light-emitting diode includes at least an N-type layer, a light-emitting layer and a P-type layer, wherein the light-emitting layer forms a “V”-shaped indentation or pit during epitaxial process and the V pit is filled in with at least one type of metal nanoparticles to generate surface plasma coupling effect and to improve recombination probability of holes and electrons, thus improving internal quantum efficiency; further, a V pit is generated in the N-type layer during epitaxial process; surface plasma coupling effect is generated by filling metal nanoparticles in the V pit to increase light reflection, light extraction efficiency and external quantum efficiency, thereby improving light emitting efficiency of LED; and the V pit is formed directly by adjusting growth rate, thickness, temperature, pressure or doping during epitaxial process instead of etching, which causes no damage to the LED epitaxial layer, thus simplifying process and improving device stability.

Abstract: A LED fabrication method includes: providing a substrate; forming a low-temperature AlxGa1-xN (0?x?1) layer over the growth substrate; setting the growth pressure from high to low and temperature and rotation rate from low to high to realize change from three-dimensional growth to two-dimensional growth of the GaN structure layer before growth of the multiple quantum-well layer, in which, Si is doped at position approximate to the multiple quantum-well layer to form an undoped gradient GaN layer and an N-type gradient GaN layer; growing a multiple quantum-well layer, an AlxGa1-xN (0?x?1) layer and a P-type layer; and during later chip fabrication, dividing the epitaxial wafer over the etched N-type platform into chip grains and immersing them in chemical solutions for wet etching; and forming an inverted pyramid structure with rough side wall over the multiple quantum-well layer to improve light-emitting efficiency.