Abstract: An NRZL bit stream is encoded by shifting the bit stream through a 9 bit storage register while logic gates detect and compare the level of adjacent bits stored in the register. The state of an output bit stream is changed if the bits stored in positions 8 and 9 of the register are alike and the change occurs at one or the other of two different times during bit time depending upon whether the pair of like bits are "1's" or "0's". If in addition to the detection of a pair of like bits in positions 8 and 9, an alternate bit pattern is detected in positions 1 through 7 of the register, changes in the output bit stream are forced at a rate of 11/2 bit time intervals until a pair of like bits are detected in positions 5 and 6 of the register. The first of the 11/2 bit time interval state changes occurs at 2 or 21/2 bit times after the state change resulting from detection of a pair of like bits depending upon the level of the bits stored in position 7 of the register.