Patents by Inventor Duane H. Oto

Duane H. Oto has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 4797856
    Abstract: A self-limiting scheme to prevent an over-erase condition of a one-transistor EEPROM cell. During an erase cycle, a drain voltage is fed back to a floating gate to counteract a positive erase voltage on the source of the memory cell and therein reduce the electric field across the tunnel oxide leading to the cessation of erase. In another scheme, the drain voltage is fed back to deactivate the erase voltage when a predetermined drain voltage value is exceeded.
    Type: Grant
    Filed: April 16, 1987
    Date of Patent: January 10, 1989
    Assignee: Intel Corporation
    Inventors: Winston K. M. Lee, Duane H. Oto, Simon M. Tam