Abstract: Method and system for routing a network packet received at a port within a network is provided. The method includes (a) generating an index value based on a destination identifier for the network packet; (b) generating one or more physical port numbers based on the index value generated in step (a); wherein each port number identifies a port for sending and receiving network packets; and (c) selecting one of the physical port numbers to route the network packet; wherein the port number is selected based on reaction selector signal that is generated from a partition key table based on a partition key value embedded in the network packet.

Abstract: Method and system for sending and receiving a network packet via an inter-switch link (ISL) is provided. The method includes receiving a network packet at a network port; obtaining a destination identifier from a packet header for the network packet; generating a physical port number for routing the network packet; generating a signal indicating that an inter-switch link for the physical port number is shared by a plurality of partitions; generating a first set of virtual lanes based on a service level to virtual lane mapping scheme; generating a second set of virtual lanes based on an inter-switch link (ISL) service level to virtual lane mapping scheme; and selecting a virtual lane from the first set of virtual lanes or the second set of virtual lanes; based on a signal generated from a partition key table.

Abstract: A crossbar structure for use in a multi-processor computer system to connect a plurality of processors to at least one shared resource. The crossbar structure comprises for each processor, a storage location for receiving from a respective processor a memory address of a lock control structure associated with the shared resource. When the processor needs to acquire a lock thereto, the crossbar structure, on behalf of the processor, performs memory operations on the lock control structure at the address specified in the storage location in order to acquire the lock on behalf of the processor.

Abstract: A remote monitoring system providing diagnostic and remedial functions to a computer system. The remote monitoring system comprises a service center and a diagnostic agent. The diagnostic agent is located proximate to the monitored computer system and electronically coupled to the monitored computer system such that the diagnostic agent can retrieve information about the various states of the monitored computer system. The diagnostic agent stores the retrieved information and further processes it for future use. Such information includes fault monitor information, accounting information, system performance information, and system management information. In addition, the diagnostic agent has control over the monitored computer system allowing it to perform diagnostic and remedial functions. Further, the diagnostic agent is electronically coupled to a service center located remotely to the monitored computer system.

Abstract: An enhanced cache line directory entry includes at least one affinity bit that indicates an affinity for a particular type of cache line ownership. The affinity bit is used to modify a request for a cache line in accordance with the indicated affinity. The affinity bit may represent an affinity for read-only requests, and the affinity bit may represent an affinity for read-write requests. For example, if an I/O affinity bit is in the set state and an I/O device requests a cache line with read-write permission, the request may be converted to a read-only request in accordance with the indicated affinity. As another example, if a processor affinity bit is in the set state and a processor requests a cache line with read-only permission, the request may be converted to a read-write request. Software control of the affinity bits enables system performance to be tuned and cache coherency operations can thereby be reduced.

Abstract: In a heterogenous symmetric multi-processing system, processors from distinct families of processors are integrated on a single platform. The processors are coupled to an implementation specific communication mechanism through family specific bus interface converters. Shared memory and I/O subsystems may be coupled to the implementation specific communication mechanism as well. An operating system maintains separate ready queues for each family of processors. Each ready queue is responsible for scheduling execution of process threads on its associated family of processors. The operating systems facilitates execution of both single mode binary code files and mixed mode binary code files. When a thread is created, the operating system determines the initial processor family to associate with the thread based on the binary code stream that the thread will begin executing. The thread is placed in the ready queue of that family.

Abstract: An enhanced cache line directory entry includes at least one affinity bit that indicates an affinity for a particular type of cache line ownership. The affinity bit is used to modify a request for a cache line in accordance with the indicated affinity. The affinity bit may represent an affinity for read-only requests, and the affinity bit may represent an affinity for read-write requests. For example, if an I/O affinity bit is in the set state and an I/O device requests a cache line with read-write permission, the request may be converted to a read-only request in accordance with the indicated affinity. As another example, if a processor affinity bit is in the set state and a processor requests a cache line with read-only permission, the request may be converted to a read-write request. Software control of the affinity bits enables system performance to be tuned and cache coherency operations can thereby be reduced.

Abstract: A configurable semiotic decision making system and method is provided. The system has a sensor for sensing input data. A generic semiotic module is used for semiotic processing of the data. The module has configurable dyadic and triadic operating modes. An allocatable memory stores knowledge base data generated in conjunction with semiotic processing by the generic semiotic module when the module processes data in a selected dyadic or triadic configured mode. The configurable operating modes of the generic semiotic module each have a specified data input, semiotic processing type, knowledge base memory allocation and output. One operating mode has the sensor as its data input and is configured for dyadic processing of said sensed data.

Abstract: A semiotic decision making system operates to respond, for example, to natural language queries. The system operates independent of the type of symbolic elements in which queries are cast. A training corpus of information in the form of sequential sets of a selected type of element is input to the system and processed by a semiotic processing module to create a knowledge database based upon the lineal relationship of elements within the training corpus. The knowledge database is then used to make decisions relating to queries input in the same type of elements. Accordingly, inputting a French training corpus results in a knowledge base useful in answering French questions. Multiple semiotic processing modules may be used to enhance performance.

Abstract: A method, system, and computer program product specifies a communication intraconnect architecture that supports a pull model based data communication where data is sent to a receiver along with a memory address (a receiver buffer address or a reference to a pool manager or buffer pool) where the data is to be stored. CIA primitives are used to create nodes and dialog objects managed by send and receive IFEs. A logical dialog is established between corresponding send and receive dialog objects. A send dialog object includes a reference that identifies for the send IFE the corresponding receive dialog object in the receive IFE. The receive dialog object includes a reference that identifies for the receive IFE the corresponding send dialog object in the send IFE. Receive and send primitives are used to provide pull model data communication over a logical dialog. Receive with Buffer and Receive with Buffer Pool operations are provided.

Abstract: A semiotic decision making system processes a training corpus of information in the form of sequential sets of elements to create a database which is thereafter used to make decisions relating to queries input in the same type of elements. Sets of sequential elements of a training corpus are received. Ordered pairs of sequential elements and ordered pairs are identified. The ordered pairs include element/element, pair/element, element/pair and pair/pair ordered pairs, in a recursive semiotic process based on the statistical occurrence of element sequences in the training corpus sets whereby each ordered pair represents an n sequential element subset of a training corpus set defined by a set of nested ordered pairs. Constituent sets of ordered pairs and elements are identified for the training corpus sets.

Abstract: A decision making system uses semiotic processing modules to transform a training corpus of information, in the form of sequential sets of symbols, into a knowledge database. The knowledge database is thereafter used to make decisions relating to queries input in the same type of training corpus symbols. In the knowledge base, the system stores data representations of analyses of subsets of the training corpus sets of sequential elements. The knowledge base data representations comprise predicates and elemental and non-elemental acts. An inductive processor recursively processes the training corpus sets by evaluating the relationship and frequency of occurrence of individual elements and sets of elements in the training corpus. After processing of the training corpus is completed, the resultant knowledge base is used to evaluate queries in a performance mode of operation.

Abstract: A method, system, and computer program product specifies a communication intraconnect architecture that supports a pull model based data communication where data is sent to a receiver along with a memory address (a receiver buffer address or a reference to a pool manager or buffer pool) where the data is to be stored. CIA primitives are used to create nodes and dialog objects managed by send and receive IFEs. A logical dialog is established between corresponding send and receive dialog objects. A send dialog object includes a reference that identifies for the send IFE the corresponding receive dialog object in the receive IFE. The receive dialog object includes a reference that identifies for the receive IFE the corresponding send dialog object in the send IFE. Receive and send primitives are used to provide pull model data communication over a logical dialog. Receive with Buffer and Receive with Buffer Pool operations are provided.

Abstract: A method, system, and computer program product specifies a communication intraconnect architecture that supports a pull model based data communication where data is sent to a receiver along with a memory address (a receiver buffer address or a reference to a pool manager or buffer pool) where the data is to be stored. CIA primitives are used to create nodes and dialog objects managed by send and receive IFEs. A logical dialog is established between corresponding send and receive dialog objects. A send dialog object includes a reference that identifies for the send IFE the corresponding receive dialog object in the receive IFE. The receive dialog object includes a reference that identifies for the receive IFE the corresponding send dialog object in the send IFE. Receive and send primitives are used to provide pull model data communication over a logical dialog. Receive with Buffer and Receive with Buffer Pool operations are provided.

Abstract: A method, system, and computer program product specifies a communication intraconnect architecture that supports a pull model based data communication where data is sent to a receiver along with a memory address (a receiver buffer address or a reference to a pool manager or buffer pool) where the data is to be stored. CIA primitives are used to create nodes and dialog objects managed by send and receive IFEs. A logical dialog is established between corresponding send and receive dialog objects. A send dialog object includes a reference that identifies for the send IFE the corresponding receive dialog object in the receive IFE. The receive dialog object includes a reference that identifies for the receive IFE the corresponding send dialog object in the send IFE. Receive and send primitives are used to provide pull model data communication over a logical dialog. Receive with Buffer and Receive with Buffer Pool operations are provided.

Abstract: A video controller that enables applications operating in a protected, multiprocessing system to update a video memory at native speeds. In this system and method, each application is assigned a separate physical address region that identifies an alias of an application's window in the video memory. The separate physical address regions provide an addressing mechanism for an application to identify a referenced set of pixels sought to be accessed. A window mapping function within the video controller that performs only those portions of a video memory access request that references pixels contained within a visible portion of an application's window as defined by priority, size and position information in a control structure.

Abstract: Apparatus and method for coordinating cache coherency between host cache memories in a distributed information system in a system which comprises at least one main storage memory coupled to a plurality of host computers through controllers. Each host computer includes a host cache controller which maintains the state of the data stored in its associated memory and maintains communicating with a main memory controller for participating in the control of coordinated reading and writing of data between the host cache memories and the main storage memory. The system maintains cache coherency by the exchange of commands between the main memory controller and the hosts cache controllers each of which define the state of the blocks of data stored in the host cache memories.

Abstract: A method for communicating active messages among nodes of a parallel processing computer system is disclosed. The active messages are defined by .mu.threads, and the method comprises the steps of: (a) generating a .mu.thread comprising an instruction pointer, frame pointer, and Local Parameters pointer from a first node to a second node; and (b) performing a procedure on a data structure in accordance with the .mu.thread. The instruction pointer points to an application specific procedure in system memory, and the frame pointer points to an application specific data structure in system memory. The Local Parameters pointer points to one or more words of additional data or parameters stored in memory mapped device registers or system memory.

Abstract: A low latency software and hardware interface between a microprocessor and Network Interface Unit is disclosed. The Network Interface Unit interfaces to the microprocessor's Level 2 cache interface, which provides burst transfers of cache lines between the microprocessor and Network Interface Unit. The Network Interface Unit is memory mapped into the microprocessor's address space. Two memory mapped cache lines are used to write commands to the Network Interface Unit's Write Window and another two cache lines are used to read results of the commands from the Network Interface Unit's Read Window. The Write Window is a three port register file. Data is written into one write port and read simultaneously from two read ports. One read port is used during read operations to the Write Window while the other is used during command execution to move data to the Internal Structures block. The Read Window is a 2-1 multiplexor that is 128 bits wide.

Abstract: A method and system for optimizing shift operations by reducing the computational overhead and the number of full scan path shifts associated with accessing and modifying data on a rotating scan path image are disclosed. The system further simplifies the construction of a scan path image by inserting a programmable number of leading and trailing bits around a selected string of data bits. The system manipulates and constructs a scan path image without having to shift or prepare the entire scan path image in memory. Specifically, the system comprises a master controller having a lead bypass module, a trail bypass module, a first shift module, a second shift module, a select module and a shift control module. Collectively, these modules comprise the necessary hardware for executing a plurality of shift optimization functions which include lead and trail bypass insertion, non-destructive read, field isolation, field insertion, bit order reversion, bit rotation and simultaneous read and write operation.