Patents by Inventor Duane James Farling

Duane James Farling has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8607076
    Abstract: Power-backup capabilities are provided by implementing a variety of different methods, systems and devices. According to one such implementation, a memory device stores data in response to data accesses under the control of a memory control circuit. A solid-state memory circuit and a volatile caching memory circuit provide the memory control circuit with access to a set of common data. A circuit carries primary operating power to the memory device. A backup power circuit has a power module having and securing a power-reservoir circuit. A capacitor holds a charge to provide operating power to the memory circuits to permit transfer of the data from the volatile memory circuit to the solid-state memory circuit. A notification circuit provides an external user indication of the power-reservoir circuit integrity. A circuit-based structure secures the power-reservoir circuit for operation as part of the memory device and facilitates replacement of the power-reservoir circuit.
    Type: Grant
    Filed: December 7, 2009
    Date of Patent: December 10, 2013
    Assignee: Seagate Technology LLC
    Inventors: Nathan Loren Lester, Duane James Farling
  • Publication number: 20110211310
    Abstract: Various embodiments are generally directed to an apparatus that provides an interconnection with efficient data signal throughput. In some embodiments, a controller printed circuit board (PCB) supports a controller integrated circuit (IC) and a support bracket. A memory PCB is supported by the support bracket in a spaced apart, parallel relation to the controller PCB. The memory PCB supports at least one memory IC and has an edge connector which engages the support bracket. A flex circuit is provided that interconnects the edge connector to an interposer positioned on the controller PCB between the respective areal extent of the controller PCB and the memory PCB to form a data signal path between the memory IC and the controller IC.
    Type: Application
    Filed: March 1, 2010
    Publication date: September 1, 2011
    Applicant: SEAGATE TECHNOLOGY LLC
    Inventors: Duane James Farling, Nathan Loren Lester, Neal Frank Gunderson, Raymond Pavlak, JR.
  • Publication number: 20100332862
    Abstract: Power-backup capabilities are provided by implementing a variety of different methods, systems and devices. According to one such implementation, a memory device stores data in response to data accesses under the control of a memory control circuit. A solid-state memory circuit and a volatile caching memory circuit provide the memory control circuit with access to a set of common data. A circuit carries primary operating power to the memory device. A backup power circuit has a power module having and securing a power-reservoir circuit. A capacitor holds a charge to provide operating power to the memory circuits to permit transfer of the data from the volatile memory circuit to the solid-state memory circuit. A notification circuit provides an external user indication of the power-reservoir circuit integrity. A circuit-based structure secures the power-reservoir circuit for operation as part of the memory device and facilitates replacement of the power-reservoir circuit.
    Type: Application
    Filed: December 7, 2009
    Publication date: December 30, 2010
    Inventors: NATHAN LOREN LESTER, DUANE JAMES FARLING
  • Patent number: 5760876
    Abstract: In photographic equipment for reading magnetically recorded data on a film strip, gradual degradation of the read data signal caused, for example, by material buildup on the magnetic read head is detected by monitoring the read data signal to indicate when the signal falls below a normal signal level but is still above a minimum threshold at which data loss would result. Apparatus useful for this purpose includes first and second comparators for sensing the decline of the data signal level into a range falling between a first predetermined normal signal level threshold and a second lower predetermined signal level preferably at or slightly above minimum detectable signal level. With such an arrangement, even though data is still capable of being read and decoded, the operator of the data read equipment is given advance warning of the incipient read data problem sufficiently in advance of read failure condition to allow corrective action, e.g. cleaning of the read head, before actual data read failures occur.
    Type: Grant
    Filed: June 11, 1996
    Date of Patent: June 2, 1998
    Assignee: Eastman Kodak Company
    Inventors: Duane James Farling, Christopher Thomas Mattson