Patents by Inventor Duane MERRILL

Duane MERRILL has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230333825
    Abstract: In various examples, systems and methods are disclosed relating to aliasing control of program variables in storage via automatic application of artificial dependences during program compilation. In some implementations, a system can include a detector to automatically detect a pattern, based at least on a structure of data flow in a source program, indicative of sequences of dependent operations, where the sequences are independent from one another. The system can determine a storage aliasing preference for whether to allow the compiler to allocate the program variables of the respective sequences to the same processor storage locations, or to prevent the compiler from doing so. The system can assign one or more annotations to the source program indicative of one or more artificial dependences for a compiler to respect when performing program transformations prior to the allocation of program variables.
    Type: Application
    Filed: April 14, 2023
    Publication date: October 19, 2023
    Applicant: NVIDIA Corporation
    Inventors: Malay SANGHI, Duane MERRILL
  • Patent number: 9928033
    Abstract: One embodiment of the present invention performs a parallel prefix scan in a single pass that incorporates variable look-back. A parallel processing unit (PPU) subdivides a list of inputs into sequentially-ordered segments and assigns each segment to a streaming multiprocessor (SM) included in the PPU. Notably, the SMs may operate in parallel. Each SM executes write operations on a segment descriptor that includes the status, aggregate, and inclusive-prefix associated with the assigned segment. Further, each SM may execute read operations on segment descriptors associated with other segments. In operation, each SM may perform reduction operations to determine a segment-wide aggregate, may perform look-back operations across multiple preceding segments to determine an exclusive-prefix, and may perform a scan seeded with the exclusive prefix to generate output data.
    Type: Grant
    Filed: October 1, 2013
    Date of Patent: March 27, 2018
    Assignee: NVIDIA Corporation
    Inventor: Duane Merrill
  • Patent number: 9619204
    Abstract: A system and method for performing sorting. The method includes partitioning a plurality of keys needing sorting into a first plurality of bins, wherein the bins are sequentially sorted. The plurality of keys is capable of being sorted into a sequence of keys using a corresponding ordering system. The method includes coalescing a first pair of consecutive bins, such that when coalesced the first pair of bins falls below a threshold. The method also includes ordering keys in the first coalesced pair to generate a first sub-sequence of keys in the sequence of keys.
    Type: Grant
    Filed: June 14, 2013
    Date of Patent: April 11, 2017
    Assignee: Nvidia Corporation
    Inventor: Duane Merrill
  • Publication number: 20140380317
    Abstract: One embodiment of the present invention performs a parallel prefix scan in a single pass that incorporates variable look-back. A parallel processing unit (PPU) subdivides a list of inputs into sequentially-ordered segments and assigns each segment to a streaming multiprocessor (SM) included in the PPU. Notably, the SMs may operate in parallel. Each SM executes write operations on a segment descriptor that includes the status, aggregate, and inclusive-prefix associated with the assigned segment. Further, each SM may execute read operations on segment descriptors associated with other segments. In operation, each SM may perform reduction operations to determine a segment-wide aggregate, may perform look-back operations across multiple preceding segments to determine an exclusive-prefix, and may perform a scan seeded with the exclusive prefix to generate output data.
    Type: Application
    Filed: October 1, 2013
    Publication date: December 25, 2014
    Applicant: NVIDIA CORPORATION
    Inventor: Duane MERRILL
  • Publication number: 20140372456
    Abstract: A system and method for performing sorting. The method includes partitioning a plurality of keys needing sorting into a first plurality of bins, wherein the bins are sequentially sorted. The plurality of keys is capable of being sorted into a sequence of keys using a corresponding ordering system. The method includes coalescing a first pair of consecutive bins, such that when coalesced the first pair of bins falls below a threshold. The method also includes ordering keys in the first coalesced pair to generate a first sub-sequence of keys in the sequence of keys.
    Type: Application
    Filed: June 14, 2013
    Publication date: December 18, 2014
    Inventor: Duane MERRILL