Patents by Inventor Duay Ing Ong

Duay Ing Ong has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6737739
    Abstract: A semiconductor chip device package comprised of a semiconductor substrate having semiconductor devices formed on the semiconductor substrate. At least one dielectric layer is over the semiconductor substrate. At least one layer of interconnects is over the semiconductor devices and within the at least one respective dielectric layer with at least a portion of the interconnects being separated by voids having a vacuum or air therein. A passivation layer is over the uppermost of the at least one layer of interconnects. Wherein the semiconductor chip device is vacuum sealed within a semiconductor chip device package.
    Type: Grant
    Filed: October 30, 2002
    Date of Patent: May 18, 2004
    Assignee: Chartered Semiconductor Manufacturing Ltd.
    Inventors: Shyue-Fong Quek, Ting Cheong Ang, Duay Ing Ong, Sang Yee Loong
  • Publication number: 20030052403
    Abstract: A semiconductor chip device package comprised of a semiconductor substrate having semiconductor devices formed on the semiconductor substrate. At least one dielectric layer is over the semiconductor substrate. At least one layer of interconnects is over the semiconductor devices and within the at least one respective dielectric layer with at least a portion of the interconnects being separated by voids having a vacuum or air therein. A passivation layer is over the uppermost of the at least one layer of interconnects. Wherein the semiconductor chip device is vacuum sealed within a semiconductor chip device package.
    Type: Application
    Filed: October 30, 2002
    Publication date: March 20, 2003
    Applicant: CHARTERED SEMICONDUCTOR MANUFACTURING LTD.
    Inventors: Shyue-Fong Quek, Ting Cheong Ang, Duay Ing Ong, Sang Yee Loong
  • Patent number: 6495399
    Abstract: A semiconductor chip device package comprised of a semiconductor substrate having semiconductor devices formed on the semiconductor substrate. At least one dielectric layer is over the semiconductor substrate. At least one layer of interconnects is over the semiconductor devices and within the at least one respective dielectric layer with at least a portion of the interconnects being separated by voids having a vacuum or air therein. A passivation layer is over the uppermost of the at least one layer of interconnects. Wherein the semiconductor chip device is vacuum sealed within a semiconductor chip device package.
    Type: Grant
    Filed: November 1, 1999
    Date of Patent: December 17, 2002
    Assignee: Chartered Semiconductor Manufacturing Ltd.
    Inventors: Shyue-Fong Quek, Ting Cheong Ang, Duay Ing Ong, Sang Yee Loong