Abstract: To program a semiconductor memory device, a plurality of target threshold voltage groups are set by dividing target threshold voltages representing states of memory cells. The target threshold voltage groups are substantially simultaneously programmed by applying a plurality of program voltages to a word line. Program end times for the target threshold voltage groups are adjusted.

Abstract: To program a semiconductor memory device, a plurality of target threshold voltage groups are set by dividing target threshold voltages representing states of memory cells. The target threshold voltage groups are substantially simultaneously programmed by applying a plurality of program voltages to a word line. Program end times for the target threshold voltage groups are adjusted.

Abstract: A method and apparatus for controlling two or more non-volatile memory devices includes activating a read enable signal or a write enable signal, which is input to the first and second non-volatile memory devices, using a controller. A first chip enable signal is alternately activated for selecting the first non-volatile memory device and a second chip enable signal is activated for selecting the second non-volatile memory device using the controller. This is done while the read enable signal or the write enable signal is input to the first and second non-volatile memory devices being activated. Accordingly, even when the minimum cycle of the controller is longer than that of a memory device read/write time is reduced, thereby improving read/write performance.

Abstract: A method and apparatus for controlling two or more non-volatile memory devices includes activating a read enable signal or a write enable signal, which is input to the first and second non-volatile memory devices, using a controller. A first chip enable signal is alternately activated for selecting the first non-volatile memory device and a second chip enable signal is activated for selecting the second non-volatile memory device using the controller. This is done while the read enable signal or the write enable signal is input to the first and second non-volatile memory devices being activated. Accordingly, even when the minimum cycle of the controller is longer than that of a memory device read/write time is reduced, thereby improving read/write performance.