Patents by Inventor Duen-Yi Ho

Duen-Yi Ho has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10932358
    Abstract: A semiconductor device includes a substrate, a die and multiple conductive traces. The die is mounted on the substrate. The conductive traces are routed on the substrate and connected to the die. The conductive traces at least include a plurality of first conductive traces and a plurality of second conductive traces. The second conductive traces are coupled to a predetermined voltage for providing a shielding pattern. The first conductive traces and the second conductive traces are disposed on the substrate in a substantially interlaced pattern.
    Type: Grant
    Filed: August 28, 2018
    Date of Patent: February 23, 2021
    Assignee: MediaTek Inc.
    Inventors: Duen-Yi Ho, Hung-Chuan Chen, Shang-Pin Chen
  • Patent number: 10679949
    Abstract: The invention provides a semiconductor package assembly. The semiconductor package assembly includes a substrate having a first pad and a second pad thereon. A logic die is mounted on the substrate. The logic die includes a first logic die pad coupled to the first pad. A memory die is mounted on the substrate. The memory die includes a first memory die pad. A first redistribution layer (RDL) trace has a first terminal and a second terminal. The first terminal is coupled to the first pad through the first memory die pad. The second terminal is coupled to the second pad rather than the first pad.
    Type: Grant
    Filed: January 20, 2017
    Date of Patent: June 9, 2020
    Assignee: MediaTek Inc.
    Inventors: Sheng-Mou Lin, Duen-Yi Ho
  • Publication number: 20190098747
    Abstract: A semiconductor device includes a substrate, a die and multiple conductive traces. The die is mounted on the substrate. The conductive traces are routed on the substrate and connected to the die. The conductive traces at least include a plurality of first conductive traces and a plurality of second conductive traces. The second conductive traces are coupled to a predetermined voltage for providing a shielding pattern. The first conductive traces and the second conductive traces are disposed on the substrate in a substantially interlaced pattern.
    Type: Application
    Filed: August 28, 2018
    Publication date: March 28, 2019
    Inventors: Duen-Yi HO, Hung-Chuan CHEN, Shang-Pin CHEN
  • Publication number: 20170263570
    Abstract: The invention provides a semiconductor package assembly. The semiconductor package assembly includes a substrate having a first pad and a second pad thereon. A logic die is mounted on the substrate. The logic die includes a first logic die pad coupled to the first pad. A memory die is mounted on the substrate. The memory die includes a first memory die pad. A first redistribution layer (RDL) trace has a first terminal and a second terminal. The first terminal is coupled to the first pad through the first memory die pad. The second terminal is coupled to the second pad rather than the first pad.
    Type: Application
    Filed: January 20, 2017
    Publication date: September 14, 2017
    Inventors: Sheng-Mou LIN, Duen-Yi HO
  • Patent number: 9043171
    Abstract: A method for calculating efficiency of a power supply system includes: displaying a parameter selection interface on the display unit for selecting power supply parameters and transmission line parameters. Obtaining power supply parameters and transmission line parameters selected by the user via the parameter selection interface when determining the user has finished the selection. Determining a efficiency of a selected power supply of the power supply parameters according to the relationship table, and calculating a sum efficiency according to the obtained power supply parameters and the transmission line parameters and the efficiency of the selected power supply. And calculating a total efficiency of the power supply system according to each sum efficiency when determining that all of the power supplies of the power supply system have been selected.
    Type: Grant
    Filed: August 28, 2012
    Date of Patent: May 26, 2015
    Assignee: HON HAI PRECISION INDUSTRY CO., LTD.
    Inventors: Tsung-Sheng Huang, Chun-Jen Chen, Duen-Yi Ho, Wei-Chieh Chou
  • Patent number: 8780536
    Abstract: A motherboard includes a printed circuit board (PCB), a central processing unit (CPU), a regulator, a first memory adaptor, and a second memory adaptor. The PCB includes a top surface, a bottom surface, a plurality of first soldering pads and first leads arranged on the top surface, and a plurality of second leads arranged between the top surface and the bottom surface. The PCB defines a plurality of first vias, second vias, and power vias. The CPU is connected to the first vias. The voltage regulator is connected to the power vias. The first memory adaptor neighbors to the regulator and is surface-mount soldered to the first soldering pads. The first soldering pads are connected to the first vias by first leads. The second memory adaptor is soldered to the second vias. The second vias are connected to the first vias by the second leads.
    Type: Grant
    Filed: October 18, 2011
    Date of Patent: July 15, 2014
    Assignee: Hon Hai Precision Industry Co., Ltd.
    Inventors: Shin-Ting Yen, Yung-Chieh Chen, Duen-Yi Ho
  • Patent number: 8581563
    Abstract: A power supply device includes a power supply unit and a feedback control unit. The power supply unit is configured for generating an electric potential to be provided to a load. The feedback control unit detects the electric potential and adjusts relevant parameters of the electrical potential to achieve predetermined values. The feedback control unit includes a first feedback circuit and a second feedback circuit electrically connected in series.
    Type: Grant
    Filed: December 30, 2011
    Date of Patent: November 12, 2013
    Assignee: Hon Hai Precision Industry Co., Ltd.
    Inventors: Wei-Chieh Chou, Duen-Yi Ho, Chun-Jen Chen, Tsung-Sheng Huang
  • Publication number: 20130284508
    Abstract: A printed circuit board (PCB) includes a power layer and a signal layer. A signal line is arranged on the signal layer. A power via extends through the power layer and the signal layer, and is electrically connected to the power layer and the signal layer. A number of through holes is defined in the PCB, through the power layer and the signal layer, and arranged between the signal line and the power via. The through holes are insulated from the power via. The inside wall of the power via is made of conductive material.
    Type: Application
    Filed: August 1, 2012
    Publication date: October 31, 2013
    Applicant: HON HAI PRECISION INDUSTRY CO., LTD.
    Inventors: WEI-CHIEH CHOU, CHUN-JEN CHEN, DUEN-YI HO, TSUNG-SHENG HUANG, PO-CHUAN HSIEH, CHUN-NENG LIAO
  • Patent number: 8536852
    Abstract: A current balance circuit includes a first and a second current sensors, an averager, a first and a second control modules, and a first and a second rheostat elements. The first and second current sensors receive a first current and a second current from a power source respectively and convert the first and second currents into a first and a second voltages. The averager receives the first and second voltages and calculates to obtain an average voltage. The first and second control modules receive the first voltage, the second voltage, and the average voltage, to obtain a first and a second control signals, to control current conduction ability of the first and second rheostat elements, to make the first and second currents keep a dynamic balance.
    Type: Grant
    Filed: March 23, 2010
    Date of Patent: September 17, 2013
    Assignee: Hon Hai Precision Industry Co., Ltd.
    Inventors: Tsung-Sheng Huang, Chun-Jen Chen, Duen-Yi Ho
  • Publication number: 20130204558
    Abstract: A method for calculating efficiency of a power supply system includes: displaying a parameter selection interface on the display unit for selecting power supply parameters and transmission line parameters. Obtaining power supply parameters and transmission line parameters selected by the user via the parameter selection interface when determining the user has finished the selection. Determining a efficiency of a selected power supply of the power supply parameters according to the relationship table, and calculating a sum efficiency according to the obtained power supply parameters and the transmission line parameters and the efficiency of the selected power supply. And calculating a total efficiency of the power supply system according to each sum efficiency when determining that all of the power supplies of the power supply system have been selected.
    Type: Application
    Filed: August 28, 2012
    Publication date: August 8, 2013
    Applicant: HON HAI PRECISION INDUSTRY CO., LTD.
    Inventors: TSUNG-SHENG HUANG, CHUN-JEN CHEN, DUEN-YI HO, WEI-CHIEH CHOU
  • Patent number: 8464201
    Abstract: An electronic device reads a layout file of a printed circuit board (PCB) to be manufactured from a storage device, obtains length information and section area information of copper cladding distributed on power source areas and ground trace areas in each of one or more layers of the PCB to be manufactured by analyzing the layout file, and calculates power loss in each of the one or more layers according to the length information, the section area information, a resistance value of the copper cladding, and preset parameters of a power supply module and an integrated circuit (IC) load to be located on the PCB. In response to a determination that the power loss in the layer exceeds a preset range, the electronic device indicates the locations of the power source areas and the ground trace areas of a layer in the PCB layout file which need to be redesigned.
    Type: Grant
    Filed: April 7, 2012
    Date of Patent: June 11, 2013
    Assignee: Hon Hai Precision Industry Co., Ltd.
    Inventors: Tsung-Sheng Huang, Chun-Jen Chen, Duen-Yi Ho, Wei-Chieh Chou, Shin-Ting Yen
  • Patent number: 8456855
    Abstract: A printed circuit board includes a first to a fifth connector pads, a first to an eighth coupling capacitor pads, a first to a tenth transmission lines, a first via and a second via, a first to a fourth sharing pads, and a voltage converting circuit. The printed circuit board is operable to selectively support different types of connectors.
    Type: Grant
    Filed: August 18, 2011
    Date of Patent: June 4, 2013
    Assignee: Hon Hai Precision Industry Co., Ltd.
    Inventors: Yung-Chieh Chen, Duen-Yi Ho, Shou-Kuo Hsu
  • Patent number: 8451615
    Abstract: A printed circuit board includes a top layer and a bottom layer. A power supply and an electronic component are located on the top layer. The power supply is connected to the top layer and the bottom layer through a first via. A number of second vias extends through the top layer and the bottom layer, and is electrically connected to the top layer and the bottom layer. A right-angled triangular void area without vias defined therein is formed on the printed circuit board, between the second vias and the electronic component. The second vias are arranged on a hypotenuse of the void area.
    Type: Grant
    Filed: April 15, 2011
    Date of Patent: May 28, 2013
    Assignee: Hon Hai Precision Industry Co., Ltd.
    Inventors: Tsung-Sheng Huang, Chun-Jen Chen, Duen-Yi Ho, Wei-Chieh Chou
  • Patent number: 8436681
    Abstract: A voltage regulating circuit includes a pulse width modulation controller, a current sense circuit, a voltage feedback circuit, and a gain-and-bias circuit. The current sense circuit includes an inductor and a capacitor. The voltage feedback circuit includes first and second resistors. The gain-and-bias circuit includes an operational amplifier. A first terminal of the capacitor is connected to an inverting input terminal of the operational amplifier through a third resistor. A second terminal of the capacitor is connected to a non-inverting input terminal of the operational amplifier through a fourth resistor. The inverting input terminal of the amplifier is connected to an output terminal of the operational amplifier through a fifth resistor. The non-inverting input terminal of the operational amplifier is grounded through a sixth resistor. The output terminal of the operational amplifier is connected to the node between the first and second resistors through a seventh resistor.
    Type: Grant
    Filed: January 18, 2011
    Date of Patent: May 7, 2013
    Assignee: Hon Hai Precision Industry Co., Ltd.
    Inventors: Duen-Yi Ho, Chun-Jen Chen, Wei-Chieh Chou, Tsung-Sheng Huang
  • Patent number: 8383955
    Abstract: A printed circuit board (PCB) includes first to fourth layers. A power supply is arranged on the first layer. An electronic component is arranged on the fourth layer. A first via and a second via extend through the PCB and are electrically connected to the electronic component. The PCB further includes third to seventh vias. A length of a transmission path of the current flows from the power supply to electronic component through the third via and the seventh via is almost the same as a length of a transmission path of the current flows from the power supply to the electronic component through the fourth to sixth vias.
    Type: Grant
    Filed: April 29, 2011
    Date of Patent: February 26, 2013
    Assignee: Hon Hai Precision Industry Co., Ltd.
    Inventors: Tsung-Sheng Huang, Chun-Jen Chen, Duen-Yi Ho, Wei-Chieh Chou
  • Publication number: 20130039025
    Abstract: A printed circuit board includes a first to a fifth connector pads, a first to an eighth coupling capacitor pads, a first to a tenth transmission lines, a first via and a second via, a first to a fourth sharing pads, and a voltage converting circuit. The printed circuit board is operable to selectively support different types of connectors.
    Type: Application
    Filed: August 18, 2011
    Publication date: February 14, 2013
    Applicant: HON HAI PRECISION INDUSTRY CO., LTD.
    Inventors: YUNG-CHIEH CHEN, DUEN-YI HO, SHOU-KUO HSU
  • Publication number: 20130016466
    Abstract: A motherboard includes a printed circuit board (PCB), a central processing unit (CPU), a regulator, a first memory adaptor, and a second memory adaptor. The PCB includes a top surface, a bottom surface, a plurality of first soldering pads and first leads arranged on the top surface, and a plurality of second leads arranged between the top surface and the bottom surface. The PCB defines a plurality of first vias, second vias, and power vias. The CPU is connected to the first vias. The voltage regulator is connected to the power vias. The first memory adaptor neighbors to the regulator and is surface-mount soldered to the first soldering pads. The first soldering pads are connected to the first vias by first leads. The second memory adaptor is soldered to the second vias. The second vias are connected to the first vias by the second leads.
    Type: Application
    Filed: October 18, 2011
    Publication date: January 17, 2013
    Applicant: HON HAI PRECISION INDUSTRY CO., LTD.
    Inventors: SHIN-TING YEN, YUNG-CHIEH CHEN, DUEN-YI HO
  • Publication number: 20130007690
    Abstract: An electronic device reads a layout file of a printed circuit board (PCB) to be manufactured from a storage device, obtains length information and section area information of copper cladding distributed on power source areas and ground trace areas in each of one or more layers of the PCB to be manufactured by analyzing the layout file, and calculates power loss in each of the one or more layers according to the length information, the section area information, a resistance value of the copper cladding, and preset parameters of a power supply module and an integrated circuit (IC) load to be located on the PCB. In response to a determination that the power loss in the layer exceeds a preset range, the electronic device indicates the locations of the power source areas and the ground trace areas of a layer in the PCB layout file which need to be redesigned.
    Type: Application
    Filed: April 7, 2012
    Publication date: January 3, 2013
    Applicant: HON HAI PRECISION INDUSTRY CO., LTD.
    Inventors: TSUNG-SHENG HUANG, CHUN-JEN CHEN, DUEN-YI HO, WEI-CHIEH CHOU, SHIN-TING YEN
  • Publication number: 20120314391
    Abstract: A circuit board includes a base board defining a number of via holes, a power supply connection unit, a load connection unit, and at least one capacitor connection unit(s). Each of the at least one capacitor connection unit(s) includes two capacitor connectors, and one of the two capacitor connectors is positioned nearer to the power supply connection unit and farther away from the load connection unit than the other. The via holes are divided into at least one group(s) corresponding to each of the capacitor connection unit(s), and all of the via holes in each of the group(s) are equidistantly positioned along a semicircle arc surrounding the capacitor connector of the capacitor connection unit corresponding to the group that is positioned nearer to the power supply connection unit.
    Type: Application
    Filed: July 15, 2011
    Publication date: December 13, 2012
    Applicant: HON HAI PRECISION INDUSTRY CO., LTD.
    Inventors: TSUNG-SHENG HUANG, CHUN-JEN CHEN, DUEN-YI HO, WEI-CHIEH CHOU
  • Publication number: 20120292090
    Abstract: A printed circuit board (PCB) comprising a first circuit area, a second circuit area, a plurality of connecting elements, and a plurality of connecting terminals placed on the first circuit area, wherein the first circuit area are electrically connected to the second circuit area through the plurality of connecting elements, the plurality of connecting elements are arranged in sequence to extend toward the plurality of connecting terminals, to form shortest current paths from the second circuit area via corresponding one of the connecting elements to the connecting terminals, respectively, and each shortest current path between the corresponding one of the connecting elements and the corresponding one of the connecting terminals is uncoated with conductive material.
    Type: Application
    Filed: June 22, 2011
    Publication date: November 22, 2012
    Applicant: HON HAI PRECISION INDUSTRY CO., LTD.
    Inventors: TSUNG-SHENG HUANG, CHUN-JEN CHEN, DUEN-YI HO, WEI-CHIEH CHOU