Abstract: A method for fabricating color filter layer of an LCD comprises forming a plurality of black matrixes separated at certain intervals on a color filter substrate, and forming R, G and B color filter layers by using a plurality of needles between the plurality of black matrixes on the color filter substrate.

Abstract: Method of fabricating a thin-film transistor (TFT) in which a gate metal is deposited onto a substrate in order to form the gate of the thin-film transistor. The substrate may be an insulative substrate or a color filter. In a first method, the gate metal is subjected to an H2 plasma. After subjecting the gate metal to an H2 plasma, the gate insulating film is deposited onto the gate. In a second method, first and second layers of gate insulating film are respectively deposited on the gate at a first and second deposition rates. One layer is deposited under H2 or argon dilution conditions and has improved insulating conditions while the other layer serves to lower the overall compressive stress of the dual layer gate insulator. In a third method, an n+ silicon film is formed on a substrate by maintaining a flow of silane, phosphine and hydrogen gas into a processing chamber at substrate temperatures of about 300° C. or less.

Abstract: Method of fabricating a thin-film transistor (TFT) in which a gate metal is deposited onto a substrate in order to form the gate of the thin-film transistor. The substrate may be an insulative substrate or a color filter. In a first method, the gate metal is subjected to an H2 plasma. After subjecting the gate metal to an H2 plasma, the gate insulating film is deposited onto the gate. In a second method, first and second layers of gate insulating film are respectively deposited on the gate at a first and second deposition rates. One layer is deposited under H2 or argon dilution conditions and has improved insulating conditions while the other layer serves to lower the overall compressive stress of the dual layer gate insulator. In a third method, an n+ silicon film is formed on a substrate by maintaining a flow of silane, phosphine and hydrogen gas into a processing chamber at substrate temperatures of about 300° C. or less.

Abstract: Method of fabricating a thin-film transistor (TFT) in which a gate metal is deposited onto a substrate in order to form the gate of the thin-film transistor. The substrate may be an insulative substrate or a color filter. In a first method, the gate metal is subjected to an H2 plasma. After subjecting the gate metal to an H2 plasma, the gate insulating film is deposited onto the gate. In a second method, first and second layers of gate insulating film are respectively deposited on the gate at a first and second deposition rates. One layer is deposited under H2 or argon dilution conditions and has improved insulating conditions while the other layer serves to lower the overall compressive stress of the dual layer gate insulator. In a third method, an n+ silicon film is formed on a substrate by maintaining a flow of silane, phosphine and hydrogen gas into a processing chamber at substrate temperatures of about 300° C. or less.

Abstract: A method for fabricating color filter layer of an LCD comprises forming a plurality of black matrixes separated at certain intervals on a color filter substrate, and forming R, G and B color filter layers by using a plurality of needles between the plurality of black matrixes on the color filter substrate.

Abstract: Method of fabricating a thin-film transistor (TFT) in which a gate metal is deposited onto a substrate in order to form the gate of the thin-film transistor. The substrate may be an insulative substrate or a color filter. In a first method, the gate metal is subjected to an H2 plasma. After subjecting the gate metal to an H2 plasma, the gate insulating film is deposited onto the gate. In a second method, first and second layers of gate insulating film are respectively deposited on the gate at a first and second deposition rates. One layer is deposited under H2 or argon dilution conditions and has improved insulating conditions while the other layer serves to lower the overall compressive stress of the dual layer gate insulator. In a third method, an n+ silicon film is formed on a substrate by maintaining a flow of silane, phosphine and hydrogen gas into a processing chamber at substrate temperatures of about 300° C. or less.

Abstract: A semiconductor device includes a substrate and a first layer of a first conductive material on the substrate, the first layer having a first etching rate. A second layer of a second conductive material has a first hole on a portion of the first layer, the second layer having a second etching rate higher than the first etching rate. A third layer includes a combination of the first and second layers between the first and the second layers, the third layer having a third etching rate lower than the second etching rate. An insulating layer has a second hole on the third layer, the insulating layer having a fourth etching rate higher than the first etching rate. A transparent conductive layer is on the third layer through the first and second holes.

Abstract: A semiconductor device includes a substrate and a first layer of a first conductive material on the substrate, the first layer having a first etching rate. A second layer of a second conductive material has a first hole on a portion of the first layer, the second layer having a second etching rate higher than the first etching rate. A third layer includes a combination of the first and second layers between the first and the second layers, the third layer having a third etching rate lower than the second etching rate. An insulating layer has a second hole on the third layer, the insulating layer having a fourth etching rate higher than the first etching rate. A transparent conductive layer is on the third layer through the first and second holes.

Abstract: A semiconductor device includes a substrate and a first layer of a first conductive material on the substrate, the first layer having a first etching rate. A second layer of a second conductive material has a first hole on a portion of the first layer, the second layer having a second etching rate higher than the first etching rate. A third layer includes a combination of the first and second layers between the first and the second layers, the third layer having a third etching rate lower than the second etching rate. An insulating layer has a second hole on the third layer, the insulating layer having a fourth etching rate higher than the first etching rate. A transparent conductive layer is on the third layer through the first and second holes.