Abstract: An array substrate for a display device includes: a substrate having a plurality of pixel regions; a plurality of gate lines on the substrate, each of the plurality of gate lines including a plurality of gate patterns spaced apart from each other; a plurality of data lines crossing the plurality of gate lines to define the plurality of pixel regions; and a first connecting pattern connecting the plurality of gate patterns, the first connecting pattern having a different layer from the plurality of gate lines.

Abstract: An array substrate for a display device includes: a substrate having a plurality of pixel regions; a plurality of gate lines on the substrate, each of the plurality of gate lines including a plurality of gate patterns spaced apart from each other; a plurality of data lines crossing the plurality of gate lines to define the plurality of pixel regions; and a first connecting pattern connecting the plurality of gate patterns, the first connecting pattern having a different layer from the plurality of gate lines.

Abstract: A method of fabricating an array substrate for a liquid crystal display device can include forming a gate line and a gate electrode, and a gate insulating layer; forming an active layer on the gate insulating layer and an ohmic contact layer on the active layer; forming a data line and source and drain electrodes; forming a passivation layer on the source and drain electrodes; and forming a pixel electrode on the passivation layer, in which the ohmic contact layer covers an entire top surface of the active layer between the source and drain electrodes; forming a metallic layer on the gate insulating layer and the ohmic contact layer; etching the metallic layer to faun the data line, and the source drain electrodes, in which a silicide layer is formed on the ohmic contact layer only in the space between the source and drain electrodes; and removing the silicide layer.

Abstract: A method of fabricating an array substrate for a liquid crystal display device can include forming a gate line and a gate electrode, and a gate insulating layer; forming an active layer on the gate insulating layer and an ohmic contact layer on the active layer; forming a data line and source and drain electrodes; forming a passivation layer on the source and drain electrodes; and forming a pixel electrode on the passivation layer, in which the ohmic contact layer covers an entire top surface of the active layer between the source and drain electrodes; forming a metallic layer on the gate insulating layer and the ohmic contact layer; etching the metallic layer to faun the data line, and the source drain electrodes, in which a silicide layer is formed on the ohmic contact layer only in the space between the source and drain electrodes; and removing the silicide layer.

Abstract: An array substrate for a liquid crystal display device includes a gate line and a gate electrode on a substrate, the gate electrode connected to the gate line; a gate insulating layer on the gate line and the gate electrode; an active layer of intrinsic amorphous silicon on the gate insulating layer and corresponding to the gate electrode; an ohmic contact layer of impurity-doped amorphous silicon on the active layer; a data line crossing the gate line; a source electrode on the ohmic contact layer and connected to the data line; a drain electrode on the ohmic contact layer and spaced apart from the source electrode; a passivation layer on the source and drain electrodes and including a drain contact hole exposing a portion of the drain electrode; and a pixel electrode on the passivation layer and connected to the drain electrode through the drain contact hole.

Abstract: An array substrate for a liquid crystal display device includes a gate line and a gate electrode on a substrate, the gate electrode connected to the gate line; a gate insulating layer on the gate line and the gate electrode; an active layer of intrinsic amorphous silicon on the gate insulating layer and corresponding to the gate electrode; an ohmic contact layer of impurity-doped amorphous silicon on the active layer; a data line crossing the gate line; a source electrode on the ohmic contact layer and connected to the data line; a drain electrode on the ohmic contact layer and spaced apart from the source electrode; a passivation layer on the source and drain electrodes and including a drain contact hole exposing a portion of the drain electrode; and a pixel electrode on the passivation layer and connected to the drain electrode through the drain contact hole.

Abstract: An array substrate for a liquid crystal display device includes a gate line and a gate electrode on a substrate, the gate electrode connected to the gate line; a gate insulating layer on the gate line and the gate electrode; an active layer of intrinsic amorphous silicon on the gate insulating layer and corresponding to the gate electrode; an ohmic contact layer of impurity-doped amorphous silicon on the active layer; a data line crossing the gate line; a source electrode on the ohmic contact layer and connected to the data line; a drain electrode on the ohmic contact layer and spaced apart from the source electrode; a passivation layer on the source and drain electrodes and including a drain contact hole exposing a portion of the drain electrode; and a pixel electrode on the passivation layer and connected to the drain electrode through the drain contact hole, wherein the ohmic contact layer covers the active layer in a space between the source and drain electrodes.