Abstract: An image sensor includes a semiconductor substrate including a pixel region and a pad region, a plurality of photoelectric conversion regions in the pixel region, an interconnect structure on a front surface of the semiconductor substrate, a pad structure in the pad region and on a rear surface of the semiconductor substrate, a through via structure in the pad region and electrically connected to the interconnect structure through the semiconductor substrate, and an isolation structure at least partially extending through the pad region of the semiconductor substrate from the rear surface of the semiconductor substrate. The isolation structure surrounds the pad structure and the through via structure in a plane extending parallel to the rear surface of the semiconductor substrate.

Abstract: An image sensor includes a semiconductor substrate including a pixel region and a pad region, a plurality of photoelectric conversion regions in the pixel region, an interconnect structure on a front surface of the semiconductor substrate, a pad structure in the pad region and on a rear surface of the semiconductor substrate, a through via structure in the pad region and electrically connected to the interconnect structure through the semiconductor substrate, and an isolation structure at least partially extending through the pad region of the semiconductor substrate from the rear surface of the semiconductor substrate. The isolation structure surrounds the pad structure and the through via structure in a plane extending parallel to the rear surface of the semiconductor substrate.

Abstract: An image sensor includes a semiconductor substrate including a pixel region and a pad region, a plurality of photoelectric conversion regions in the pixel region, an interconnect structure on a front surface of the semiconductor substrate, a pad structure in the pad region and on a rear surface of the semiconductor substrate, a through via structure in the pad region and electrically connected to the interconnect structure through the semiconductor substrate, and an isolation structure at least partially extending through the pad region of the semiconductor substrate from the rear surface of the semiconductor substrate. The isolation structure surrounds the pad structure and the through via structure in a plane extending parallel to the rear surface of the semiconductor substrate.

Abstract: An image sensor includes a semiconductor substrate including a pixel region and a pad region, a plurality of photoelectric conversion regions in the pixel region, an interconnect structure on a front surface of the semiconductor substrate, a pad structure in the pad region and on a rear surface of the semiconductor substrate, a through via structure in the pad region and electrically connected to the interconnect structure through the semiconductor substrate, and an isolation structure at least partially extending through the pad region of the semiconductor substrate from the rear surface of the semiconductor substrate. The isolation structure surrounds the pad structure and the through via structure in a plane extending parallel to the rear surface of the semiconductor substrate.

Abstract: Example embodiments may provide methods of manufacturing an image sensor. Example methods of manufacturing an image sensor may include forming a photoelectric converter in a semiconductor substrate, forming an interlayer insulating film covering a surface of the semiconductor substrate, forming metal wires and an inter-metal insulating film filling between the metal wires on the interlayer insulating film, forming openings above the photoelectric converter by removing a part of the inter-metal insulating film and the interlayer insulating film, curing the surface above the photoelectric converter by irradiating light into the openings, and/or forming a light transmitter filling the openings.

Abstract: Disclosed is a metal-insulator-metal (MIM) capacitor structure formed by a metal interconnection process of trench-exposed metal layers formed on stacked interlayer insulating layers. The MIM capacitor uses a conductive layer conformally formed on the metal interconnection and/or trench regions to enlarge constituent electrode surface areas.

Abstract: Example embodiments may provide methods of manufacturing an image sensor. Example methods of manufacturing an image sensor may include forming a photoelectric converter in a semiconductor substrate, forming an interlayer insulating film covering a surface of the semiconductor substrate, forming metal wires and an inter-metal insulating film filling between the metal wires on the interlayer insulating film, forming openings above the photoelectric converter by removing a part of the inter-metal insulating film and the interlayer insulating film, curing the surface above the photoelectric converter by irradiating light into the openings, and/or forming a light transmitter filling the openings.

Abstract: A non-volatile memory device and method of fabricating same are disclosed. The memory device comprises; a gate insulating film formed on a semiconductor substrate, a floating gate completely covering the gate insulating film, the floating gate comprising a conductive film pattern and a conductive spacer formed at one side of the conductive film pattern, a tunnel insulating film formed on a portion of the conductive film pattern, the conductive spacer, and extending laterally outward over a portion of the semiconductor substrate adjacent the conductive spacer, a control gate formed on the tunnel insulating film, a first impurity region formed within the semiconductor substrate proximate one side of the conductive film pattern opposite the conductive spacer, and a second impurity region formed within the semiconductor substrate proximate one side of the control gate disposed laterally outward from the floating gate.

Abstract: Disclosed is a metal-insulator-metal (MIM) capacitor structure formed by a metal interconnection process of trench-exposed metal layers formed on stacked interlayer insulating layers. The MIM capacitor uses a conductive layer conformally formed on the metal interconnection and/or trench regions to enlarge constituent electrode surface areas.

Abstract: In a semiconductor device, and a method of fabricating the same, the semiconductor device includes a bottom electrode and a first interconnection layer on a semiconductor substrate, an upper surface of the bottom electrode and an upper surface of the first interconnection layer being level, an interlayer insulating layer having a trench exposing the upper surface of the bottom electrode and a via hole exposing the upper surface of the first interconnection layer, a contact plug formed of a first material inside the via hole and connected to the first interconnection layer, an upper electrode formed of a second material inside the trench on the bottom electrode, the first material being exclusive of the second material, and a dielectric layer interposed between the bottom electrode and the upper electrode, and formed only inside the trench.