Abstract: A network interface card (NIC) receives a stream of commands, a respective command comprising memory-operation requests, each request associated with a destination NIC. The NIC buffers asynchronously the requests into queues based on the destination NIC, each queue specific to a corresponding destination NIC. When first queue requests reach a threshold, the NIC aggregates the first queue requests into a first packet and sends the first packet to the destination NIC. The NIC receives a plurality of packets, a second packet comprising memory-operation requests, each request associated with a same destination NIC and a destination core. The NIC buffers asynchronously the requests of the second packet into queues based on the destination core, each queue specific to a corresponding destination core. When second queue requests reach the threshold, the NIC aggregates the second queue requests into a third packet and sends the third packet to the destination core.

Abstract: A method for conducting a network performance analysis, the method comprising measuring latencies of a plurality of packets communicated over a network includes determining latency representations for a plurality of levels of the network, for a plurality of communication routes, and/or for a plurality of communication types. The latency representations comprise the latency measurements, statistical representations of the latency measurements, and/or latency metrics derived from the latency measurements. The method includes comparing the determined latency representations to expected latency representations, the expected latency representations comprising expected latencies, expected statistical representation of latencies, and/or expected latency metrics.

Abstract: Systems and methods are described for providing per traffic class routing of data within a network. A network switch has the capability to classify traffic data based on High Performance Computing (HPC) related characteristics. Traffic classes are defined based on aspects of HPC, such as routing, ordering, redirection, quiesce, HPC protocol configuration, and telemetry. A switch can receive packets at an ingress port of a switch fabric, and determine traffic classifications for the packets. The traffic classification is selected from a group of defined traffic classes. Then, the switch can generate a fabric specific flag for the at least one packet that indicates the determined traffic classification, where the fabric specific flag is used for routing packets based on their assigned traffic classification. Examples of traffic classes include: low latency class; dedicated access class; bulk data class; best efforts class; and scavenger class.

Abstract: A network interface controller (NIC) capable of efficient operation management for host accelerators is provided. The NIC can be equipped with a host interface and triggering logic block. During operation, the host interface can couple the NIC to a host device. The triggering logic block can obtain, via the host interface from the host device, an operation associated with an accelerator of the host device. The triggering logic block can determine whether a triggering condition has been satisfied for the operation based on an indicator received from the accelerator. If the triggering condition has been satisfied, the triggering logic block can obtain a piece of data generated from the accelerator from a memory location and execute the operation using the piece of data.

Abstract: A network interface controller (NIC) capable of facilitating fine-grain flow control (FGFC) is provided. The NIC can be equipped with a network interface, an FGFC logic block, and a traffic management logic block. During operation, the network interface can determine that a control frame from a switch is associated with FGFC. The network interface can then identify a data flow indicated in the control frame for applying the FGFC. The FGFC logic block can insert information from the control frame into an entry of a data structure stored in the NIC. The traffic management logic block can identify the entry in the data structure based on one or more fields of a packet belonging to the flow. Subsequently, the traffic management logic block can determine whether the packet is allowed to be forwarded based on the information in the entry.

Abstract: A network interface controller (NIC) capable of performing message passing interface (MPI) list matching is provided. The NIC can include a host interface, a network interface, and a hardware list-processing engine (LPE). The host interface can couple the NIC to a host device. The network interface can couple the NIC to a network. During operation, the LPE can receive a match request and perform MPI list matching based on the received match request.

Abstract: An apparatus facilitating efficient key refresh in a node is provided. During operation, the apparatus can determine a collective operation initiated by the node. The node can include a processor and can be in a distributed system comprising a plurality of nodes. The collective operation can be performed by a subset of the plurality of nodes in conjunction with each other. The apparatus can generate a new key based on a previous key maintained at the apparatus. Here, a respective key can be used for encrypting an inter-node packet in the distributed system. The apparatus can maintain the new and previous keys for the duration of the collective operation. Either of the new and previous keys can be used for decrypting messages received at the apparatus from other nodes of the distributed system. Upon determining a threshold point of the collective operation, the apparatus can discard the previous key.

Abstract: One embodiment provides a network interface controller (NIC). The NIC can include a storage device, a network interface, a hardware list-processing engine (LPE), and a message state table (MST) logic block. The storage device can store an MST. The network interface can couple the NIC to a network. The LPE can perform message matching on a first packet of a message received via the network interface. The MST logic block can store results of the message matching in the MST and receive a request to read the results of the message matching from the MST if the NIC receives a second packet associated with the message.

Abstract: A switch architecture for a data-driven intelligent networking system is provided. The system can accommodate dynamic traffic with fast, effective congestion control. The system can maintain state information of individual packet flows, which can be set up or released dynamically based on injected data. Each flow can be provided with a flow-specific input queue upon arriving at a switch. Packets of a respective flow are acknowledged after reaching the egress point of the network, and the acknowledgement packets are sent back to the ingress point of the flow along the same data path. As a result, each switch can obtain state information of each flow and perform flow control on a per-flow basis.

Abstract: System and methods are described for providing adaptive routing in the presence of persistent flows. Switches in a fabric have the capability to establish flow channels. Switches can adaptively route flows, while monitoring transmission characteristics of the flows channels to identify whether any flows are experiencing congestion towards a destination. In response to detecting congestion, it can be further determined whether the flow is related to a source of congestion, or alternative the flow is a victim of congestion. Flows that are a source of congestion have their routing constrained to prevent congestion from propagating. For example, new packets of a flow that is a source of congestion may be forced to only take the path of the data transmission that detected said congestion (preventing congestion from spreading). Alternatively, victims of congestion do not have their routing constrained, and packets can take any path as permitted by adaptive routing.

Abstract: A network interface controller (NIC) capable of efficient command management is provided. The NIC can be equipped with a host interface, an arbitration logic block, and a command management logic block. During operation, the host interface can couple the NIC to a host device. The arbitration logic block can select a command queue of the host device for obtaining a command. The command management logic block can determine whether an internal buffer associated with the command queue includes a command. If the internal buffer includes the command, the command management logic block can obtain the command from the internal buffer. On the other hand, if the internal buffer is empty, the command management logic block can obtain the command from the command queue via the host interface.

Abstract: Systems and methods are provided for a modular switch system that comprises disaggregated components, plugins, and managers that enable flexibility to adjust the dynamic configuration of a switch system. This can create modularity and customizability at different times of the lifecycle of the currently configured switch system.

Abstract: Systems and methods are provided for passing data amongst a plurality of switches having a plurality of links attached between the plurality of switches. At a switch, a plurality of load signals are received from a plurality of neighboring switches. Each of the plurality of load signals are made up of a set of values indicative of a load at each of the plurality of neighboring switches providing the load signal. Each value within the set of values provides an indication for each link of the plurality of links attached thereto as to whether the link is busy or quiet. Based upon the plurality of load signals, an output link for routing a received packet is selected, and the received packet is routed via the selected output link.

Abstract: A network interface controller (NIC) capable of performing message passing interface (MPI) list matching is provided. The NIC can include a host interface, a network interface, and a hardware list-processing engine (LPE). The host interface can couple the NIC to a host device. The network interface can couple the NIC to a network. During operation, the LPE can receive a match request and perform MPI list matching based on the received match request.

Abstract: A network interface controller (NIC) capable of efficient operation management for host accelerators is provided. The NIC can be equipped with a host interface and triggering logic block. During operation, the host interface can couple the NIC to a host device. The triggering logic block can obtain, via the host interface from the host device, an operation associated with an accelerator of the host device. The triggering logic block can determine whether a triggering condition has been satisfied for the operation based on an indicator received from the accelerator. If the triggering condition has been satisfied, the triggering logic block can obtain a piece of data generated from the accelerator from a memory location and execute the operation using the piece of data.

Abstract: A network interface controller (NIC) capable of facilitating fine-grain flow control (FGFC) is provided. The NIC can be equipped with a network interface, an FGFC logic block, and a traffic management logic block. During operation, the network interface can determine that a control frame from a switch is associated with FGFC. The network interface can then identify a data flow indicated in the control frame for applying the FGFC. The FGFC logic block can insert information from the control frame into an entry of a data structure stored in the NIC. The traffic management logic block can identify the entry in the data structure based on one or more fields of a packet belonging to the flow. Subsequently, the traffic management logic block can determine whether the packet is allowed to be forwarded based on the information in the entry.

Abstract: One embodiment provides a network interface controller (NIC). The NIC can include a storage device, a network interface, a hardware list-processing engine (LPE), and a message state table (MST) logic block. The storage device can store an MST. The network interface can couple the NIC to a network. The LPE can perform message matching on a first packet of a message received via the network interface. The MST logic block can store results of the message matching in the MST and receive a request to read the results of the message matching from the MST if the NIC receives a second packet associated with the message.

Abstract: A switch architecture for a data-driven intelligent networking system is provided. The system can accommodate dynamic traffic with fast, effective congestion control. The system can maintain state information of individual packet flows, which can be set up or released dynamically based on injected data. Each flow can be provided with a flow-specific input queue upon arriving at a switch. Packets of a respective flow are acknowledged after reaching the egress point of the network, and the acknowledgement packets are sent back to the ingress point of the flow along the same data path. As a result, each switch can obtain state information of each flow and perform flow control on a per-flow basis.

Abstract: An apparatus is provided that includes a network interface to transmit and receive data packets over a network; a memory including one or more buffers; an arithmetic logic unit to perform arithmetic operations for organizing and combining the data packets; and a circuitry to receive, via the network interface, data packets from the network; aggregate, via the arithmetic logic unit, the received data packets in the one or more buffers at a network rate; and transmit, via the network interface, the aggregated data packets to one or more compute nodes in the network, thereby optimizing latency incurred in combining the received data packets and transmitting the aggregated data packets, and hence accelerating a bulk data allreduce operation. One embodiment provides a system and method for performing the allreduce operation. During operation, the system performs the allreduce operation by pacing network operations for enhancing performance of the allreduce operation.

Abstract: A network interface controller (NIC) capable of efficient management of non-idempotent operations is provided. The NIC can be equipped with a network interface, storage management logic block, and an operation management logic block. During operation, the network interface can receive a request for an operation from a remote device. The storage management logic block can store, in a local data structure, outcome of operations executed by the NIC. The operation management logic block can determine whether the NIC has previously executed the operation. If the NIC has previously executed the operation, the operation management logic block can obtain an outcome of the operation from the data structure and generate a response comprising the obtained outcome for responding to the request.