Abstract: The humidifier has an upper tank and a lower reservoir. A liquid level switch in the lower reservoir works in conjunction with a valve in a water passage between the upper tank and the lower reservoir in order to provide an automated flow of water to the lower reservoir during operation of the humidifier. The upper tank is unsealed, such that air in the upper tank may equalize with an ambient air pressure. The humidifier can be top-filled allowing that the upper tank to be permanently affixed to the base of the humidifier.

Abstract: A compressive imaging system includes an illumination system arranged to illuminate an object of interest with illumination light, and a detection system configured to detect at least a portion of the illumination light after being at least one of reflected from, scattered from, or transmitted through the object of interest or to detect fluorescent light from the object of interest and to provide an imaging signal. The compressive imaging system further includes an image processing system configured to communicate with the detection system to receive the imaging signal. The illumination light from the illumination system comprises a plurality of light pulses such that each light pulse has a preselected spectrum that is distinguishable from spectra of all other pulses. The image processing system is configured to form an image of the object of interest using information concerning the preselected spectra of the plurality of light pulses.

Abstract: An apparatus for engaging and moving a ram block. In some embodiments, the apparatus, or ram block changer, includes a support bracket coupled to a blowout preventer and an articulated arm releasably coupled to the ram block. The ram block changer may further include a pivot coupling assembly having a first axis of rotation. The pivot coupling assembly extends through the support bracket and the articulated arm, wherein the articulated arm is rotatable about the first axis of rotation relative to the support bracket. The articulated arm may include a first member receiving the pivot coupling assembly therethrough, a second member coupled to the ram block, and a second pivot coupling assembly having a second axis of rotation spaced apart from the first axis of rotation and extending through the first and second members. The second member is rotatable about the second axis of rotation relative to the first member.

Abstract: A compressive imaging system includes an illumination system arranged to illuminate an object of interest with illumination light, and a detection system configured to detect at least a portion of the illumination light after being at least one of reflected from, scattered from, or transmitted through the object of interest or to detect fluorescent light from the object of interest and to provide an imaging signal. The compressive imaging system further includes an image processing system configured to communicate with the detection system to receive the imaging signal. The illumination light from the illumination system comprises a plurality of light pulses such that each light pulse has a preselected spectrum that is distinguishable from spectra of all other pulses. The image processing system is configured to form an image of the object of interest using information concerning the preselected spectra of the plurality of light pulses.

Abstract: The humidifier has an upper tank and a lower reservoir. A liquid level switch in the lower reservoir works in conjunction with a valve in a water passage between the upper tank and the lower reservoir in order to provide an automated flow of water to the lower reservoir during operation of the humidifier. The upper tank is unsealed, such that air in the upper tank may equalize with an ambient air pressure. The humidifier can be top-filled allowing that the upper tank to be permanently affixed to the base of the humidifier.

Abstract: An apparatus for engaging and moving a ram block. In some embodiments, the apparatus, or ram block changer, includes a support bracket coupled to a blowout preventer and an articulated arm releasably coupled to the ram block. The ram block changer may further include a pivot coupling assembly having a first axis of rotation. The pivot coupling assembly extends through the support bracket and the articulated arm, wherein the articulated arm is rotatable about the first axis of rotation relative to the support bracket. The articulated arm may include a first member receiving the pivot coupling assembly therethrough, a second member coupled to the ram block, and a second pivot coupling assembly having a second axis of rotation spaced apart from the first axis of rotation and extending through the first and second members. The second member is rotatable about the second axis of rotation relative to the first member.

Abstract: An apparatus for engaging and moving a ram block. In some embodiments, the apparatus, or ram block changer, includes a support bracket coupled to a blowout preventer and an articulated arm releasably coupled to the ram block. The ram block changer may further include a pivot coupling assembly having a first axis of rotation. The pivot coupling assembly extends through the support bracket and the articulated arm, wherein the articulated arm is rotatable about the first axis of rotation relative to the support bracket. The articulated arm may include a first member receiving the pivot coupling assembly therethrough, a second member coupled to the ram block, and a second pivot coupling assembly having a second axis of rotation spaced apart from the first axis of rotation and extending through the first and second members. The second member is rotatable about the second axis of rotation relative to the first member.

Abstract: An apparatus for engaging and moving a ram block. In some embodiments, the apparatus, or ram block changer, includes a support bracket coupled to a blowout preventer and an articulated arm releasably coupled to the ram block. The ram block changer may further include a pivot coupling assembly having a first axis of rotation. The pivot coupling assembly extends through the support bracket and the articulated arm, wherein the articulated arm is rotatable about the first axis of rotation relative to the support bracket. The articulated aim may include a first member receiving the pivot coupling assembly therethrough, a second member coupled to the ram block, and a second pivot coupling assembly having a second axis of rotation spaced apart from the first axis of rotation and extending through the first and second members. The second member is rotatable about the second axis of rotation relative to the first member.

Abstract: Multistage signal amplification, including level translation, improves signal integrity, e.g., slew rate, complementary signal delay and duty cycle performance, by mirroring complementary output current in an output stage based on a signal developed in an input stage pull-up network. A multistage amplifier may comprise a first stage comprising a differential input circuit coupled, respectively, between first and second inputs and first and second nodes, wherein the first node is coupled to a first pull-up circuit controlled by the first node and the second node is coupled to a second pull-up circuit controlled by the second node; and a second stage comprising a complementary output circuit coupled, respectively, between first and second nodes and first and second outputs, wherein a current mirror sinks essentially the same current at the first output as is sourced at the second output and vice versa. The pull-up network may further comprise a cross-coupled pull-up circuit.

Abstract: A discharge lamp lighting control device (100) having a DC power converter, a power factor improving power converter (1), a polarity reversing circuit (2), a starter circuit (3), and a controller (4). The power factor improving power converter 1 includes a switching device S, a power factor improver, and a power converter. The power factor improver operates to smooth a rectified voltage by storing energy in a first inductive device L1 and by discharging energy from a second inductive device L2, in which the first and second inductive devices are magnetically coupled together. The storing and discharging is performed by turning ON and OFF the switching device S. A predetermined DC voltage is converted by energy stored and discharged by a third inductive device L3 in response to the turning ON and OFF of the switching device S.

Abstract: A memory array contains memory cells designed to be erased using Fowler-Nordheim (“FN”) tunneling through the channel area, and programmed using either channel hot electron injection (“CHE”) or channel-initiated secondary electron injection (“CISEI”). To reduce disturbance of the floating gate potential of unselected memory cells during programming operations and read operations, the unselected word lines are brought to a negative potential rather than ground potential. To reduce disturbance of the floating gate potential of unselected memory cells during FN erase operations, the unselected word lines are brought to a positive potential rather than ground potential.

Abstract: A memory array contains memory cells designed to be erased using Fowler-Nordheim (“FN”) tunneling through the channel area, and programmed using either channel hot electron injection (“CHE”) or channel-initiated secondary electron injection (“CISEI”). To reduce disturbance of the floating gate potential of unselected memory cells during programming operations and read operations, the unselected word lines are brought to a negative potential rather than ground potential. To reduce disturbance of the floating gate potential of unselected memory cells during FN erase operations, the unselected word lines are brought to a positive potential rather than ground potential.

Abstract: A convergence signal includes a series of voltage pulses used to perform a convergence procedure in one or more flash EEPROM memory cells (transistors). In one instance subsequent voltage pulses in the convergence signal each have a higher voltage than the preceding pulse. In another instance, subsequent voltage pulses in the convergence signal each have a longer duration than the preceding pulse. An integrated circuit includes an array of memory cells and an erase control unit which controls the application of the convergence signal to one or more memory cells. The integrated circuit may be either serial or parallel flash EEPROM in which bulk, sector, or page mode erasing is used.

Abstract: A convergence signal includes a series of voltage pulses used to perform a convergence procedure in one or more flash EEPROM memory cells (transistors). In one instance subsequent voltage pulses in the convergence signal each have a higher voltage than the preceding pulse. In another instance, subsequent voltage pulses in the convergence signal each have a longer duration than the preceding pulse. An integrated circuit includes an array of memory cells and an erase control unit which controls the application of the convergence signal to one or more memory cells. The integrated circuit may be either serial or parallel flash EEPROM in which bulk, sector, or page mode erasing is used.

Abstract: A memory array contains memory cells designed to be erased using Fowler-Nordheim (“FN”) tunneling through the channel area, and programmed using either channel hot electron injection (“CHE”) or channel-initiated secondary electron injection (“CISEI”). To reduce disturbance of the floating gate potential of unselected memory cells during programming operations and read operations, the unselected word lines are brought to a negative potential rather than ground potential. To reduce disturbance of the floating gate potential of unselected memory cells during FN erase operations, the unselected word lines are brought to a positive potential rather than ground potential.

Abstract: A memory array contains memory cells designed to be erased using Fowler-Nordheim (“FN”) tunneling through the channel area, and programmed using either channel hot electron injection (“CHE”) or channel-initiated secondary electron injection (“CISEI”). To reduce disturbance of the floating gate potential of unselected memory cells during programming operations and read operations, the unselected word lines are brought to a negative potential rather than ground potential. To reduce disturbance of the floating gate potential of unselected memory cells during FN erase operations, the unselected word lines are brought to a positive potential rather than ground potential.