Patents by Inventor Durgesh Kumar Dubey

Durgesh Kumar Dubey has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Circuit architecture to derive higher mux from lower mux design
    Patent number: 11222670
    Abstract: Various implementations described herein are directed to an implementation of a higher order multiplexer using lower order multiplexers. In an embodiment, the implementation requires a slight modification to the existing circuitry design of the lower multiplexers. A plurality of multiplexers may be coupled with each other such that a common input port and output port is formed. Using an enable signal, only one of the coupled multiplexers may be enabled at a time while the remaining multiplexers are switched off. Therefore, upon receiving a select signal indicating an address of a memory cell, the lower multiplexers coupled together function as a higher order multiplexer in selecting the appropriate column corresponding to the memory cell.
    Type: Grant
    Filed: December 10, 2019
    Date of Patent: January 11, 2022
    Assignee: Arm Limited
    Inventors: Lalit Gupta, Nicolaas Klarinus Johannes Van Winkelhoff, El Mehdi Boujamaa, Bo Zheng, Fakhruddin Ali Bohra, Cyrille Nicolas Dray, Ashish Bhardwaj, Durgesh Kumar Dubey
  • Circuit Architecture to Derive Higher Mux From Lower Mux Design
    Publication number: 20210110851
    Abstract: Various implementations described herein are directed to an implementation of a higher order multiplexer using lower order multiplexers. In an embodiment, the implementation requires a slight modification to the existing circuitry design of the lower multiplexers. A plurality of multiplexers may be coupled with each other such that a common input port and output port is formed. Using an enable signal, only one of the coupled multiplexers may be enabled at a time while the remaining multiplexers are switched off. Therefore, upon receiving a select signal indicating an address of a memory cell, the lower multiplexers coupled together function as a higher order multiplexer in selecting the appropriate column corresponding to the memory cell.
    Type: Application
    Filed: December 10, 2019
    Publication date: April 15, 2021
    Inventors: Lalit Gupta, Nicolaas Klarinus Johannes Van Winkelhoff, El Mehdi Boujamaa, Bo Zheng, Fakhruddin Ali Bohra, Cyrille Nicolas Dray, Ashish Bhardwaj, Durgesh Kumar Dubey