Abstract: The motor speed control circuit senses average back EMF as a measure of motor speed. The back EMF charges a capacitor circuit which accumulates charge and develops a voltage indicative of the motor speed. A sample and hold circuit may be used to sample the back EMF when the motor is switched off during each cycle. This voltage is compared with a reference voltage indicative of the desired motor speed. An error signal is generated by comparing the desired speed with the actual speed and this error signal is used to generate a variable duty cycle pulse train which gates the power controlling transistor on and off to control motor speed. A logic gated or SCR gated voltage boosting circuit operates in synchronism with the gating pulse train to drive the power transistor hard into saturation. This lowers the resistance of the power transistor, causing less energy dissipation as waste heat.