Abstract: A number of different sealed interfaces for power modules are described. In one example, a sealed interface includes a printed circuit board including a contact pad for power conduction to a bus bar of the printed circuit board, a semiconductor module including at least one power transistor, a terminal pin electrically coupled to the power module, and a housing for the power module. The housing includes an open terminal aperture that extends through the housing. The printed circuit board is seated upon the open terminal aperture, to close and seal the open terminal aperture, with the contact pad positioned within the open terminal aperture. The terminal pin contacts the contact pad of the printed circuit board within the open terminal aperture, and the open terminal aperture comprises a transitional feature to abate electric field intensity around an interface between the open terminal aperture and the printed circuit board.

Abstract: Aspects of switching-cycle voltage deviation control for modular multilevel converters (MMCs) are described. In one example, an upper switching action of an upper power cell is determined within a time duration of a switching cycle for an MMC. In addition, a lower switching action of a lower power cell is determined within the time duration of the switching cycle for the MMC. In addition, a delay is generated between the upper switching action and the lower switching action to reduce capacitor voltage deviation between the upper power cell and the lower power cell during the switching cycle. The upper power cell is located in an upper arm of a phase leg of the MMC, while the lower power cell is located in a lower arm of the phase leg of the MMC.

Abstract: Topologies and configurations of step-down power supplies including unidirectional balancing cells are described. In one example, a step-down power supply includes an input and an output, a string of series-connected capacitors, and a plurality of unidirectional balancing cells coupled to the capacitors in the string of series-connected capacitors. A first balancing can be configured to transfer power, unilaterally, in a first direction among at least two capacitors in the string of series-connected capacitors, and a second balancing cell can be configured to transfer power, unilaterally, in a second direction among at least two capacitors in the string of series-connected capacitors, where the first direction is different than the second direction. The power supply can also include a gate controller for a balancing cell. The gate controller generates switching control signals at a first switching frequency that is decoupled from a resonant frequency of a balancing branch in the balancing cell.

Abstract: A number of different sealed interfaces for power modules are described. In one example, a sealed interface includes a printed circuit board including a contact pad for power conduction to a bus bar of the printed circuit board, a semiconductor module including at least one power transistor, a terminal pin electrically coupled to the power module, and a housing for the power module. The housing includes an open terminal aperture that extends through the housing. The printed circuit board is seated upon the open terminal aperture, to close and seal the open terminal aperture, with the contact pad positioned within the open terminal aperture. The terminal pin contacts the contact pad of the printed circuit board within the open terminal aperture, and the open terminal aperture comprises a transitional feature to abate electric field intensity around an interface between the open terminal aperture and the printed circuit board.

Abstract: Aspects of hybrid-current-mode switching-cycle control are described. In one embodiment, a peak current mode is selected to control a switching power cell. The switching power cell is in an arm of a phase leg of a modular multilevel converter. The phase leg includes an upper arm and a lower arm, and the switching power cell includes a capacitor and at least one switch. At least one switch control signal switches the switching power cell according to a peak current mode based on at least one arm current boundary crossing identified for the arm.

Abstract: Various embodiments of laminated planar bus structures that minimize electromagnetic interference (EMI) and parasitic inductance are described. In one embodiment, a laminated planar bus structure may include a plurality of stacked conductive layers and a plurality of stacked insulation layers. The plurality of stacked conductive layers may include positive and negative conductive layers, and conductive ground layers stacked as outer layers as to enclose vertically the positive and the negative conductive layers. In another embodiment, the laminated planar bus structure may include a middle ground layer stacked in between the positive and the negative conductive layers to provide additional reduction in electric field strength. A laminated planar bus structure that is integrated with other power electronics components is also presented.

Abstract: Aspects of an efficient compensation network for reducing reactive power in a wireless power transfer (WPT) system are disclosed. The compensation network comprises a series/series (S/S) constant current (CC) source, a reactive power compensation capacitor, and a constant current (CC)-to-constant voltage (CV) network. In an example, the S/S CC source comprises a first capacitor connected in series with a first inductor on a primary side of a transformer and a second inductor on a secondary side of the transformer. The S/S CC source converts an input voltage signal of the WPT system into a constant alternating current (AC) current signal. In an example, the CC-to-CV network comprises at least a third capacitor and a third inductor. The CC-to-CV network converts the constant AC current signal into a constant AC voltage signal.

Abstract: An inductor having a coaxial structure is described. In one example, the structure of the single-turn inductor can include a conductor, an insulation layer, a shielding layer, and a magnetic core. An air duct can be located between the shielding layer and the magnetic core. The shielding layer and the magnetic core can both be connected to a ground. In one example, the single-turn inductor can include a single-layer termination structure formed on terminations of the shielding layer. In another example, the single-turn inductor can include a double-layer termination structure formed on terminations of the shielding layer. Displacement current in the single-turn inductor can be reduced using, for example, lumped equivalent circuit models, a semi-conductive shielding layer model, or a resistive layer and conductive shielding layer model.

Abstract: A three-phase, N-level inverter and method are disclosed. A circuit topology of the inverter comprises first, second and third sets of switches and first, second and third inductors. Each switch comprises at least first, second and third terminals, the first terminals being control terminals. The first terminals of the first, second and third inductors are electrically coupled to the first, second and third sets of switches, respectively. A current controller performs a control algorithm that causes it to output first, second and third sets of gating signals to the control terminals of the switches of the first, second and third sets of switches, respectively, to cause them to be placed in an on state or an off state in a particular sequence to perform zero voltage switching while maintaining synchronization of the three phases of the three-phase, N-level inverter.

Abstract: Various embodiments of laminated planar bus structures that minimize electromagnetic interference (EMI) and parasitic inductance are described. In one embodiment, a laminated planar bus structure may include a plurality of stacked conductive layers and a plurality of stacked insulation layers. The plurality of stacked conductive layers may include positive and negative conductive layers, and conductive ground layers stacked as outer layers as to enclose vertically the positive and the negative conductive layers. In another embodiment, the laminated planar bus structure may include a middle ground layer stacked in between the positive and the negative conductive layers to provide additional reduction in electric field strength. A laminated planar bus structure that is integrated with other power electronics components is also presented.

Abstract: Aspects of hybrid-current-mode switching-cycle control are described. In one embodiment, a peak current mode is selected to control a switching power cell. The switching power cell is in an arm of a phase leg of a modular multilevel converter. The phase leg includes an upper arm and a lower arm, and the switching power cell includes a capacitor and at least one switch. At least one switch control signal switches the switching power cell according to a peak current mode based on at least one arm current boundary crossing identified for the arm.

Abstract: A three-phase, N-level inverter and method are disclosed. A circuit topology of the inverter comprises first, second and third sets of switches and first, second and third inductors. Each switch comprises at least first, second and third terminals, the first terminals being control terminals. The first terminals of the first, second and third inductors are electrically coupled to the first, second and third sets of switches, respectively. A current controller performs a control algorithm that causes it to output first, second and third sets of gating signals to the control terminals of the switches of the first, second and third sets of switches, respectively, to cause them to be placed in an on state or an off state in a particular sequence to perform zero voltage switching while maintaining synchronization of the three phases of the three-phase, N-level inverter.

Abstract: Aspects of non-linear droop control are described herein. In one embodiment, a system includes a first power converter or source configured to provide power to a bus, a second power converter or source configured to provide power to the bus, and a load electrically coupled to the bus. The system also includes a controller configured to adjust a droop resistance associated with the first power source according to a continuous non-linear function based on an amount of current supplied to the load by the first power source. The system can also include a second controller configured to adjust a droop resistance associated with the second power source according to the continuous non-linear function (or another continuous non-linear function). The use of the continuous non-linear functions achieves tighter voltage regulation particularly at lower loads and better load sharing at higher loads.

Abstract: The present invention provides a battery charger and battery charging method controlled with a charging waveform input of an AC-DC switching circuit to a DC link and a DC-DC stage converter for outputting a regulated DC voltage. The method determining the charging waveform comprising the steps of selecting a Pulse Width Modulation (PWM) zero-off charging waveform signal input to the AC-DC switching circuit and calculating a ripple power at the DC link based on the signal input power and output power of the regulated DC voltage output.

Abstract: In one example, a power converter includes a modular multilevel converter (MMC) electrically coupled between a first power system and a second power system. The MMC includes an arrangement of switching submodules, and the switching submodules include an arrangement of switching power transistors and capacitors. The MMC also includes a controller configured to inject a common mode frequency signal into a circulating current control loop. The circulating current control loop is relied upon to reduce at least one low frequency component in power used for charging the capacitors in the switching submodules. By injecting the common mode frequency signal into the circulating current control loop, the switching submodules can be switched at higher frequencies, the capacitances of the capacitors in the MMC can be reduced, and the power density of the MMC can be increased.

Abstract: In one example, a power converter includes a modular multilevel converter (MMC) electrically coupled between a first power system and a second power system. The MMC includes an arrangement of switching submodules, and the switching submodules include an arrangement of switching power transistors and capacitors. The MMC also includes a controller configured to inject a common mode frequency signal into a circulating current control loop. The circulating current control loop is relied upon to reduce at least one low frequency component in power used for charging the capacitors in the switching submodules. By injecting the common mode frequency signal into the circulating current control loop, the switching submodules can be switched at higher frequencies, the capacitances of the capacitors in the MMC can be reduced, and the power density of the MMC can be increased.

Abstract: In a switching module structure that includes a low-impedance path to ground, such as a parasitic capacitance of an insulating substrate, a further insulating substrate presenting a parasitic capacitance placed in series with the low impedance current path and a connection of a conductive layer to input voltage rails using a single decoupling capacitor or, preferably, a midpoint of the voltage rails formed by a series connection of decoupling capacitors maintains a large portion of common mode (CM) currents which are due to high dV/dt slew rates of SiC and GaN transistors within the switching module.

Abstract: In a modular multi-level power converter, additional switching states are interleaved between main switching states that control output voltage or waveform. The additional switching states provide current from a DC-link to charge capacitors in respective modules or cells to an offset voltage from which the capacitor voltages are controlled toward a reference voltage during each switching cycle rather than being allowed to build up over a period of an output waveform of variable line frequency, possibly including zero frequency. Since the switching cycle is much shorter than the duration of a line frequency cycle and the capacitor voltages are balanced during each switching cycle, output voltage ripple can be limited as desired with a capacitor of much smaller value and size than would otherwise be required.

Abstract: Aspects of interface converter common mode (CM) voltage control are described. In one embodiment, a bi-directional alternating current (AC) to direct current (DC) interface converter system includes an AC-DC converter between an AC power system and an interface link and a DC-DC converter between a DC power system and the interface link. The AC-DC converter can include a bridge converter having power switches, such as field-insulated gate bipolar transistors (IGBTs) or another power semiconductor device. The system also includes a control loop that generates control signals for switching the power switches of the AC-DC converter, and a CM control loop that injects a CM control signal into the control loop. By injecting the CM control signal into the control loop, low-frequency ripple and asymmetry between positive and negative output voltages of the DC power system can be reduced.

Abstract: Wobbling the operating frequency of a phase-locked loop (PLL), preferably by adding a periodic variation is feedback gain or delay in reference signal phase allows the avoidance of any non-detection zone that might occur due to exact synchronization of the phase locked loop operating frequency with a reference signal. If the change in PLL operating frequency is periodic, it can be made of adequate speed variation to accommodate and time requirement for islanding detection or the like when a reference signal being tracked by the PLL is lost. Such wobbling of the PLL operating frequency is preferably achieved by addition a periodic variable gain in a feedback loop and/or adding a periodically varying phase delay in a reference signal and/or PLL output.