Patents by Inventor Dwayne E. Ebersole

Dwayne E. Ebersole has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11300992
    Abstract: Methods and systems for implementing independent time in a hosted operating environment are disclosed. The hosted, or guest, operating environment, can be seeded with a guest time value by a guest operating environment manager that maintains a time delta between a host clock time and an enterprise time. The guest operating environment can subsequently manage its guest clock from the guest time value. If the guest operating environment is halted, the guest operating environment manager can manage correspondence between the host clock time and the enterprise time by periodically assessing divergence between actual and expected values of the host clock time.
    Type: Grant
    Filed: September 10, 2019
    Date of Patent: April 12, 2022
    Assignee: Unisys Corporation
    Inventors: Robert F. Inforzato, Dwayne E. Ebersole, Daryl R. Smith, Grace W. Lin, Andrew Ward Beale, Loren C. Wilton
  • Publication number: 20210072786
    Abstract: Methods and systems for implementing independent time in a hosted operating environment are disclosed. The hosted, or guest, operating environment, can be seeded with a guest time value by a guest operating environment manager that maintains a time delta between a host clock time and an enterprise time. The guest operating environment can subsequently manage its guest clock from the guest time value. If the guest operating environment is halted, the guest operating environment manager can manage correspondence between the host clock time and the enterprise time by periodically assessing divergence between actual and expected values of the host clock time.
    Type: Application
    Filed: September 10, 2019
    Publication date: March 11, 2021
    Inventors: ROBERT F. INFORZATO, DWAYNE E. EBERSOLE, DARYL R. SMITH, GRACE W. LIN, ANDREW WARD BEALE, LOREN C. WILTON
  • Patent number: 9836295
    Abstract: A method and system for secure automated deployment of an emulated computer system. The method includes providing a download package for installation on a target machine. The download package includes a generic emulated computer system having no unique identity, no model identity, no features, and minimal processing components. The download package also includes a customer order file based on an order from a customer of the target machine. The customer order file includes a machine identity, at least one machine capability, and control data. The download package also includes at least one enabling key configured to enable the emulated computer system on the target machine. The enabling key is customized based on the order from the customer of the target machine, and includes identity information that restricts the use of the emulated computer system on any computer system other than the target machine.
    Type: Grant
    Filed: November 4, 2015
    Date of Patent: December 5, 2017
    Assignee: Unisys Corporation
    Inventors: Philip M Hoffman, Sharon M Mauer, Michael I Bell, Greg L Gensichen, Dwayne E Ebersole, Tatyana Martsun
  • Publication number: 20160077937
    Abstract: A fabric computer method and system for recovering fabric computer node function. The fabric computer method includes monitoring a processing environment operating on a first Processor and Memory node within the fabric computer complex, detecting a failure of the first Processor and Memory node, and transferring the processing environment from the first Processor and Memory node to a second Processor and Memory node within the fabric computer complex in response to the detection of a failure of the first Processor and Memory node. The fabric computer system includes a first Processor and Memory node, a second Processor and Memory node coupled to the first Processor and Memory node, at least one input/output (I/O) and Networking node coupled to the first and second Processor and Memory nodes, and a fabric manager coupled to the first and second Processor and Memory nodes and the at least one I/O and Networking node.
    Type: Application
    Filed: September 16, 2014
    Publication date: March 17, 2016
    Applicant: Unisys Corporation
    Inventors: Robert F. Inforzato, Richard E. Blyler, Andrew F. Sanderson, Steven E. Clarke, Dwayne E. Ebersole, Steven L. Forbes, Andrew Ward Beale, Craig F. Russ, Craig R. Church, Derek W. Paul
  • Patent number: 7581033
    Abstract: Intelligent NIC optimizations includes system and methods for Token Table Posting, use of a Master Completion Queue, Notification Request Area (NRA) associated with completion queues, preferably in the Network Interface Card (NIC) for providing notification of request completions, and what we call Lazy Memory Deregistration which allows non-critical memory deregistration processing to occur during non-busy times. These intelligent NIC optimizations which can be applied outside the scope of VIA (e.g. iWARP and the like), but also support VIA.
    Type: Grant
    Filed: December 5, 2003
    Date of Patent: August 25, 2009
    Assignee: Unisys Corporation
    Inventors: Dwayne E. Ebersole, Sarah K. Inforzato, Robert A. Johnson, Anthony Narisi, Kathleen Wild
  • Publication number: 20090172301
    Abstract: Intelligent NIC optimizations includes system and methods for Token Table Posting, use of a Master Completion Queue, Notification Request Area (NRA) associated with completion queues, preferably in the Network Interface Card (NIC) for providing notification of request completions, and what we call Lazy Memory Deregistration which allows non-critical memory deregistration processing to occur during non-busy times. These intelligent NIC optimizations which can be applied outside the scope of VIA (e.g. iWARP and the like), but also support VIA.
    Type: Application
    Filed: December 5, 2003
    Publication date: July 2, 2009
    Inventors: Dwayne E. Ebersole, Sarah K. Inforzato, Robert A. Johnson, Anthony Narisi, Kathleen Wild
  • Publication number: 20090043886
    Abstract: Optimization of the Virtual Interface Architecture (VIA) on Multiprocessor Servers using Physically Independent Consolidated NICs (Network Interface Cards) allows for improved throughput, increased resiliency and transparent fail-over; and also by hiding the actual NICs involved in particular data transactions, enables operations with substantially unmodified applications software.
    Type: Application
    Filed: October 21, 2008
    Publication date: February 12, 2009
    Inventors: Dwayne E. Ebersole, Anthony Narisi
  • Patent number: 7457861
    Abstract: Optimization of the Virtual Interface Architecture (VIA) on Multiprocessor Servers using Physically Independent Consolidated NICs (Network Interface Cards) allows for improved throughput, increased resiliency and transparent fail-over; and also by hiding the actual NICs involved in particular data transactions, enables operations with substantially unmodified applications software.
    Type: Grant
    Filed: December 5, 2003
    Date of Patent: November 25, 2008
    Assignee: Unisys Corporation
    Inventors: Dwayne E. Ebersole, Anthony Narisi
  • Publication number: 20080275989
    Abstract: Optimization of the Virtual Interface Architecture (VIA) on Multiprocessor Servers using Physically Independent Consolidated NICs (Network Interface Cards) allows for improved throughput, increased resiliency and transparent fail-over; and also by hiding the actual NICs involved in particular data transactions, enables operations with substantially unmodified applications software.
    Type: Application
    Filed: December 5, 2003
    Publication date: November 6, 2008
    Inventors: Dwayne E. Ebersole, Anthony Narisi
  • Patent number: 6473803
    Abstract: Methods and apparatus that enable a first network protocol provider, executing on a first computer system, and a second network protocol provider, executing on a second computer system which is directly interconnected to the first computer system, to communicate at high speed, with low latency, over the interconnection therebetween such that both systems may use their native mechanisms to communicate with each other without change in those mechanisms, rather than over conventional network communication paths such as Ethernet. An interconnection couples the input/output (I/O) subsystem of the first computer system to the I/O subsystem of the second computer system such data can be transmitted between the systems, and a virtual LAN (“VLAN”) device driver executing on the second computer system provides an interface between the interconnection and the native communications mechanisms of the second computer system.
    Type: Grant
    Filed: June 1, 1998
    Date of Patent: October 29, 2002
    Assignee: Unisys Corporation
    Inventors: Joel A. Stern, Robert A. Johnson, Dwayne E. Ebersole, William W. Disney
  • Patent number: 6289388
    Abstract: A first network protocol provider, executing on a first computer system and having a first network address associated therewith, and a second network protocol provider, executing on a second computer system and having a second network address associated therewith, share a same network interface card installed on the second computer system. Apparatus providing this ability comprises an interconnection between the first and second computer systems over which data can be transferred between them, and a router executing on the second computer system that routes data among the first network protocol provider (via the interconnection), the second network protocol provider, and the network interface card in a manner that enables the network interface card to be shared between the first and second network protocol providers.
    Type: Grant
    Filed: June 1, 1998
    Date of Patent: September 11, 2001
    Assignee: Unisys Corporation
    Inventors: William W. Disney, Robert A. Johnson, Dwayne E. Ebersole