Patents by Inventor Dwight Barron

Dwight Barron has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20160092362
    Abstract: According to an example, memory traffic including memory access commands is routed between compute nodes and memory nodes in a memory network. Other traffic is also routed in the memory network. The other traffic may include input/output traffic between the compute nodes and peripherals connected to the memory network.
    Type: Application
    Filed: April 30, 2013
    Publication date: March 31, 2016
    Inventors: Dwight Barron, Paolo Faraboschi, Norman P. Jouppi, Michael R. Krause, Sheng Li
  • Publication number: 20070188351
    Abstract: A hardware enablement apparatus includes a processor, and a communications interface configured for writing license data to one or more data registers and for using the license data to selectively enable, under control of the processor, hardware features associated with the data registers, at least one of the data registers being implemented in non-volatile memory.
    Type: Application
    Filed: December 16, 2005
    Publication date: August 16, 2007
    Inventors: Andrew Brown, E. Neufeld, Dwight Barron, Andrew Fisher
  • Publication number: 20050038941
    Abstract: The disclosed embodiments relate to an optimized memory registration mechanism that may comprise an upper layer protocol that associates I/O buffers with memory regions and that manages steering tags. The memory regions may be associated with a translation page table. The upper layer protocol may allocate one of the steering tags associated with at least one of the memory regions for a memory operation.
    Type: Application
    Filed: August 14, 2003
    Publication date: February 17, 2005
    Inventors: Mallikarjun Chadalapaka, Dwight Barron, Paul Culley, Jeffrey Hilland, James Wendt