Patents by Inventor Dwight Lee Daniels

Dwight Lee Daniels has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230378106
    Abstract: An electronic device substrate with a substantially planar surface formed from an electrically non-conductive material is provided with one or more metalized pads on the substantially planner surface. Each of the one or more metalized pads is surrounded by and coplanar with the first electrically nonconductive material along an outer boundary of the metalized pad. The metalized pad is patterned such that portions of the metalized pad form metalized fingers that extend radially from the outer boundary of the metalized pad in an interdigitated arrangement with the first electrically nonconductive material. The metalized pad has a solderable surface.
    Type: Application
    Filed: May 19, 2022
    Publication date: November 23, 2023
    Inventors: Namrata Kanth, Paul Southworth, Scott M. Hayes, Dwight Lee Daniels, Yufu Liu, Jeroen Johannes Maria Zaal, Cheong Chiang Ng
  • Patent number: 11127645
    Abstract: A semiconductor device includes a substrate, an IC die mounted on the substrate, packaging encapsulant on the substrate, a cavity in the packaging encapsulant, a conductive lid attached to the packaging encapsulant over the IC die, an electrical ground path in the substrate, and a first conductive structure in the cavity. The first conductive structure includes a first end electrically coupled to the conductive lid and a second end electrically coupled to the electrical ground path.
    Type: Grant
    Filed: June 19, 2019
    Date of Patent: September 21, 2021
    Assignee: NXP USA, Inc.
    Inventors: Dwight Lee Daniels, Stephen Ryan Hooper, Michael B. Vincent
  • Patent number: 10892229
    Abstract: Embodiments for a packaged semiconductor device and methods of making are provided herein, where a packaged semiconductor device includes a package body having a recess in which a pressure sensor is located; a polymeric gel within the recess that vertically and laterally surrounds the pressure sensor; and a media shield including at least one metal layer on a top surface of the polymeric gel, wherein the media shield and the polymeric gel are sufficiently flexible to transmit pressure to the pressure sensor.
    Type: Grant
    Filed: April 5, 2019
    Date of Patent: January 12, 2021
    Assignee: NXP USA, INC.
    Inventors: Stephen Ryan Hooper, Dwight Lee Daniels, Thomas Cobb Speight, Gary Carl Johnson
  • Publication number: 20200402878
    Abstract: A semiconductor device includes a substrate, an IC die mounted on the substrate, packaging encapsulant on the substrate, a cavity in the packaging encapsulant, a conductive lid attached to the packaging encapsulant over the IC die, an electrical ground path in the substrate, and a first conductive structure in the cavity. The first conductive structure includes a first end electrically coupled to the conductive lid and a second end electrically coupled to the electrical ground path.
    Type: Application
    Filed: June 19, 2019
    Publication date: December 24, 2020
    Inventors: Dwight Lee DANIELS, Stephen Ryan HOOPER, Michael B. VINCENT
  • Publication number: 20200321286
    Abstract: Embodiments for a packaged semiconductor device and methods of making are provided herein, where a packaged semiconductor device includes a package body having a recess in which a pressure sensor is located; a polymeric gel within the recess that vertically and laterally surrounds the pressure sensor; and a media shield including at least one metal layer on a top surface of the polymeric gel, wherein the media shield and the polymeric gel are sufficiently flexible to transmit pressure to the pressure sensor.
    Type: Application
    Filed: April 5, 2019
    Publication date: October 8, 2020
    Inventors: Stephen Ryan Hooper, Dwight Lee Daniels, Thomas Cobb Speight, Gary Carl Johnson
  • Patent number: 10658303
    Abstract: A packaged semiconductor device includes: a substrate; an semiconductor die attached to a top surface of the substrate; a mold body surrounding the semiconductor die; a tiered through mold via (TMV) comprising: a first recess having a recessed surface within the mold body at a first depth, and a second recess from the recessed surface to a second depth that exposes a ground contact area on a bonding area on the top surface of the substrate, wherein the first depth is greater than the second depth; and a metal shielding layer formed on a top surface of the mold body to form a shielded mold body, wherein the metal shielding layer makes direct contact with at least one sidewall of the first recess, with at least a portion of the recessed surface, with at least one sidewall of the second recess, and with the ground contact area.
    Type: Grant
    Filed: November 8, 2018
    Date of Patent: May 19, 2020
    Assignee: NXP USA, Inc.
    Inventors: Michael B. Vincent, Stephen Ryan Hooper, Dwight Lee Daniels
  • Publication number: 20200152579
    Abstract: A packaged semiconductor device includes: a substrate; an semiconductor die attached to a top surface of the substrate; a mold body surrounding the semiconductor die; a tiered through mold via (TMV) comprising: a first recess having a recessed surface within the mold body at a first depth, and a second recess from the recessed surface to a second depth that exposes a ground contact area on a bonding area on the top surface of the substrate, wherein the first depth is greater than the second depth; and a metal shielding layer formed on a top surface of the mold body to form a shielded mold body, wherein the metal shielding layer makes direct contact with at least one sidewall of the first recess, with at least a portion of the recessed surface, with at least one sidewall of the second recess, and with the ground contact area.
    Type: Application
    Filed: November 8, 2018
    Publication date: May 14, 2020
    Inventors: Michael B. VINCENT, Stephen Ryan Hooper, Dwight Lee Daniels
  • Patent number: 9818656
    Abstract: A method of testing includes attaching a first and second die to first and second die sites of a lead frame and forming a plurality of wire bonds coupling a plurality of pins of the first die site to the first die and a plurality of pins of the second die site to the second die. The first and second die are encapsulated. An isolation cut is performed to isolate the plurality of pins of the first die site from the plurality of pins of the second die site, while maintaining electrical connection between the first tie bar of the first die site and the first tie bar of the second die site. The first and second die are tested while providing a first power supply source to the first and second die via the first tie bars. After testing, the dies sites are fully singulated to result in packaged IC device.
    Type: Grant
    Filed: May 23, 2017
    Date of Patent: November 14, 2017
    Assignee: NXP USA, Inc.
    Inventors: Mark Edward Schlarmann, Dwight Lee Daniels, Stephen Ryan Hooper, Chad Dawson, Fengyuan Li