Abstract: Vibration isolation can be provided for a vibration sensitive component to be bonded to electronic circuit boards or other surfaces by an assembly that includes two substrates with rigid portions that are electrically coupled to each other via a flexible interconnect. The rigid portions of the two substrates are bonded together via an elastic structure in a stacked arrangement with the first substrate above the second substrate. The flexible interconnect electrically couples the first substrate to the second substrate and the second substrate is configured to be bonded and electrically coupled to an electronic circuit board or other larger substrate via contacts on a surface of the rigid portion of the second substrate. The vibration sensitive component can be bonded to the rigid portion of the first substrate and couped to the flexible interconnect via the first substrate, thereby coupling it to the second substrate and the larger substrate.

Abstract: An alignment recess formed in a cover substrate such as a cover for a MEMS device allows a second substrate to be bonded to the cover substrate. The alignment recess is larger than the second substrate and has two corner regions diagonally opposite each other where a wall of the recess protrudes to form a notch. The notch is dimensioned such that when the second substrate is disposed within the recess with two opposing corners surrounded by respective notches of the recess, the angular position of the second substrate relative to the cover substrate can be controlled to within a desired amount of rotation.

Abstract: Alignment features formed on a cover substrate allow for a second substrate to be bonded to the cover substrate while ensuring that the second substrate is not titled with respect to a plane defined by the alignment features. Die attachment material is patterned such that it deforms or flows underneath the second substrate while allowing corners of the second substrate to rest on landing areas that are elevated above the top surface of the cover substrate. Some of the landing areas may include additional features that are elevated above the landing areas to form notches which constrain the rotational position of the second in addition to its tilt.

Abstract: A packaged semiconductor device (200) is disclosed, having a first major surface (210), a second major surface (220), and sidewalls (230) therebetween, the packaged device comprising: a moulding compound (240) around a perimeter of the device and defining at least a part of the sidewalls; a lid (250) defining the first major surface, and defining a cavity (252) within the packaged semiconductor device; wherein the lid extends from a central region, to and beyond an upper surface of the moulding compound, and comprises a lip (260) around at least part of the moulding compound; further comprising an adhesive material (270), between a top surface of the moulding compound and the lid and providing a bond therebetween. Related methods are also disclosed.

Abstract: An electronic device substrate with a substantially planar surface formed from an electrically non-conductive material is provided with one or more metalized pads on the substantially planner surface. Each of the one or more metalized pads is surrounded by and coplanar with the first electrically nonconductive material along an outer boundary of the metalized pad. The metalized pad is patterned such that portions of the metalized pad form metalized fingers that extend radially from the outer boundary of the metalized pad in an interdigitated arrangement with the first electrically nonconductive material. The metalized pad has a solderable surface.

Abstract: An electronic device substrate with a substantially planar surface formed from an electrically non-conductive material is provided with one or more metalized pads on the substantially planner surface. Each of the one or more metalized pads is surrounded by and coplanar with the first electrically nonconductive material along an outer boundary of the metalized pad. The metalized pad is patterned such that portions of the metalized pad form metalized fingers that extend radially from the outer boundary of the metalized pad in an interdigitated arrangement with the first electrically nonconductive material. The metalized pad has a solderable surface.

Abstract: A semiconductor device includes a substrate, an IC die mounted on the substrate, packaging encapsulant on the substrate, a cavity in the packaging encapsulant, a conductive lid attached to the packaging encapsulant over the IC die, an electrical ground path in the substrate, and a first conductive structure in the cavity. The first conductive structure includes a first end electrically coupled to the conductive lid and a second end electrically coupled to the electrical ground path.

Abstract: Embodiments for a packaged semiconductor device and methods of making are provided herein, where a packaged semiconductor device includes a package body having a recess in which a pressure sensor is located; a polymeric gel within the recess that vertically and laterally surrounds the pressure sensor; and a media shield including at least one metal layer on a top surface of the polymeric gel, wherein the media shield and the polymeric gel are sufficiently flexible to transmit pressure to the pressure sensor.

Abstract: A semiconductor device includes a substrate, an IC die mounted on the substrate, packaging encapsulant on the substrate, a cavity in the packaging encapsulant, a conductive lid attached to the packaging encapsulant over the IC die, an electrical ground path in the substrate, and a first conductive structure in the cavity. The first conductive structure includes a first end electrically coupled to the conductive lid and a second end electrically coupled to the electrical ground path.

Abstract: Embodiments for a packaged semiconductor device and methods of making are provided herein, where a packaged semiconductor device includes a package body having a recess in which a pressure sensor is located; a polymeric gel within the recess that vertically and laterally surrounds the pressure sensor; and a media shield including at least one metal layer on a top surface of the polymeric gel, wherein the media shield and the polymeric gel are sufficiently flexible to transmit pressure to the pressure sensor.

Abstract: A packaged semiconductor device includes: a substrate; an semiconductor die attached to a top surface of the substrate; a mold body surrounding the semiconductor die; a tiered through mold via (TMV) comprising: a first recess having a recessed surface within the mold body at a first depth, and a second recess from the recessed surface to a second depth that exposes a ground contact area on a bonding area on the top surface of the substrate, wherein the first depth is greater than the second depth; and a metal shielding layer formed on a top surface of the mold body to form a shielded mold body, wherein the metal shielding layer makes direct contact with at least one sidewall of the first recess, with at least a portion of the recessed surface, with at least one sidewall of the second recess, and with the ground contact area.

Abstract: A packaged semiconductor device includes: a substrate; an semiconductor die attached to a top surface of the substrate; a mold body surrounding the semiconductor die; a tiered through mold via (TMV) comprising: a first recess having a recessed surface within the mold body at a first depth, and a second recess from the recessed surface to a second depth that exposes a ground contact area on a bonding area on the top surface of the substrate, wherein the first depth is greater than the second depth; and a metal shielding layer formed on a top surface of the mold body to form a shielded mold body, wherein the metal shielding layer makes direct contact with at least one sidewall of the first recess, with at least a portion of the recessed surface, with at least one sidewall of the second recess, and with the ground contact area.

Abstract: A method of testing includes attaching a first and second die to first and second die sites of a lead frame and forming a plurality of wire bonds coupling a plurality of pins of the first die site to the first die and a plurality of pins of the second die site to the second die. The first and second die are encapsulated. An isolation cut is performed to isolate the plurality of pins of the first die site from the plurality of pins of the second die site, while maintaining electrical connection between the first tie bar of the first die site and the first tie bar of the second die site. The first and second die are tested while providing a first power supply source to the first and second die via the first tie bars. After testing, the dies sites are fully singulated to result in packaged IC device.