Abstract: Systems and techniques for are described herein. An optical signal is received and the optical signal is converted into an electrical signal. The electrical signal is amplified through a trans-impedance amplifier to produce an amplified signal. The amplified signal is normalized using a limit amplifier to generate a normalized signal. Bit values are determined from the normalized signal and a corresponding probability bit is generated for each bit value using a threshold detector. The bit values and the corresponding probability bit are encoded into a four-level pulse-amplitude modulation (PAM-4) signal. The PAM-4 signal is transmitted to an application-specific integrated circuit (ASIC) for data recovery and error correction processing.

Abstract: A system includes one or more memories, and model generation circuitry coupled to the one or more memories, wherein the model generation circuitry is configured to: determine a plurality of decision trees, wherein each decision tree is associated with a corresponding network whose attribute data, including interface statistics, is used for training a trained model and includes one or more decision nodes for indicating whether the corresponding network includes a rogue network device; aggregate the plurality of decision trees to generate the trained model; and output the trained model for rogue network device detection.

Abstract: Systems and techniques for are described herein. An optical signal is received and the optical signal is converted into an electrical signal. The electrical signal is amplified through a trans-impedance amplifier to produce an amplified signal. The amplified signal is normalized using a limit amplifier to generate a normalized signal. Bit values are determined from the normalized signal and a corresponding probability bit is generated for each bit value using a threshold detector. The bit values and the corresponding probability bit are encoded into a four-level pulse-amplitude modulation (PAM-4) signal. The PAM-4 signal is transmitted to an application-specific integrated circuit (ASIC) for data recovery and error correction processing.