Abstract: An acoustic resonator device includes a substrate having a surface and a single-crystal piezoelectric plate bonded to the substrate surface. A portion of the piezoelectric plate forms a diaphragm that spans a cavity. A conductor pattern including an interdigital transducer (IDT) formed on a surface of the single-crystal piezoelectric plate such that interleaved fingers of the IDT are disposed on the diaphragm. A dielectric cover is disposed over the IDT and the plate, and the dielectric cover forms an air gap above the IDT and the plate.

Abstract: Filter devices are disclosed. A filter device includes a piezoelectric plate comprising a supported portion, a first diaphragm, and a second diaphragm. The supported portion is attached to a substrate and the first and second diaphragms spans respective cavities in the substrate. A first interdigital transducer (IDT) has interleaved fingers on the first diaphragm. A second interdigital transducer (IDT) has interleaved fingers on the second diaphragm. A first dielectric layer is between the interleaved fingers of the first IDT, and a second dielectric layer is between the interleaved fingers of the second IDT. A thickness of the first dielectric layer is greater than a thickness of the second dielectric layer. The piezoelectric plate and the first and second IDTs are configured such that radio frequency signals applied to first and second IDTs excite primary shear acoustic modes in the respective diaphragms.

Abstract: Methods of fabricating filter devices are disclosed. A back surface of a piezoelectric plate having a first thickness is attached to a substrate. The front surface of the piezoelectric plate is selectively etched to thin a portion of the piezoelectric plate from the first thickness to a second thickness less than the first thickness. Cavities are formed in the substrate such that portions of the piezoelectric plate form a plurality of diaphragms spanning respective cavities. A conductor pattern is formed on the front surface. The conductor pattern includes a first interdigital transducer (IDT) with interleaved fingers on a first diaphragm having the first thickness and a second IDT with interleaved fingers on a second diaphragm having the second thickness.

Abstract: A ratcheting buckle can be used on watches, belts, other types of apparel or any item having a band. The ratcheting buckle allows a band to be adjusted in much smaller increments than traditional bands. A unique buckle configuration enables this ratcheting to be achieved without sacrificing aesthetic appeal or usability.

Abstract: Watch bands can employ clasps that are configured to ratchet. Due to this ratcheting, the watch bands can be adjusted which much smaller increments than traditional watch bands. A unique clasp configuration enables this ratcheting to be achieved without sacrificing aesthetic appeal or usability.

Abstract: A charge pump method and apparatus is described having various aspects. Noise injection from a charge pump to other circuits may be reduced by limiting both positive and negative clock transition rates, as well as by limiting drive currents within clock generator driver circuits, and also by increasing a control node AC impedance of certain transfer capacitor coupling switches. A single-phase clock may be used to control as many as all active switches within a charge pump, and capacitive coupling may simplify biasing and timing for clock signals controlling transfer capacitor coupling switches. Any combination of such aspects of the method or apparatus may be employed to quiet and/or simplify charge pump designs over a wide range of charge pump architectures.

Abstract: A charge pump method and apparatus is described having various aspects. Noise injection from a charge pump to other circuits may be reduced by limiting both positive and negative clock transition rates, as well as by limiting drive currents within clock generator driver circuits, and also by increasing a control node AC impedance of certain transfer capacitor coupling switches. A single-phase clock may be used to control as many as all active switches within a charge pump, and capacitive coupling may simplify biasing and timing for clock signals controlling transfer capacitor coupling switches. Any combination of such aspects of the method or apparatus may be employed to quiet and/or simplify charge pump designs over a wide range of charge pump architectures.

Abstract: A circuit and method for controlling charge injection in a circuit are disclosed. In one embodiment, the circuit and method are employed in a semiconductor-on-insulator (SOI) Radio Frequency (RF) switch. In one embodiment, an SOI RF switch comprises a plurality of switching transistors coupled in series, referred to as “stacked” transistors, and implemented as a monolithic integrated circuit on an SOI substrate. Charge injection control elements are coupled to receive injected charge from resistively-isolated nodes located between the switching transistors, and to convey the injected charge to at least one node that is not resistively-isolated. In one embodiment, the charge injection control elements comprise resistors. In another embodiment, the charge injection control elements comprise transistors.

Abstract: A method and apparatus are disclosed for use in improving the gate oxide reliability of semiconductor-on-insulator (SOI) metal-oxide-silicon field effect transistor (MOSFET) devices using accumulated charge control (ACC) techniques. The method and apparatus are adapted to remove, reduce, or otherwise control accumulated charge in SOI MOSFETs, thereby yielding improvements in FET performance characteristics. In one embodiment, a circuit comprises a MOSFET, operating in an accumulated charge regime, and means for controlling the accumulated charge, operatively coupled to the SOI MOSFET. A first determination is made of the effects of an uncontrolled accumulated charge on time dependent dielectric breakdown (TDDB) of the gate oxide of the SOI MOSFET. A second determination is made of the effects of a controlled accumulated charge on TDDB of the gate oxide of the SOI MOSFET.

Abstract: A method and apparatus for use in improving the linearity characteristics of MOSFET devices using an accumulated charge sink (ACS) are disclosed. The method and apparatus are adapted to remove, reduce, or otherwise control accumulated charge in SOI MOSFETs, thereby yielding improvements in FET performance characteristics. In one exemplary embodiment, a circuit having at least one SOI MOSFET is configured to operate in an accumulated charge regime. An accumulated charge sink, operatively coupled to the body of the SOI MOSFET, eliminates, removes or otherwise controls accumulated charge when the FET is operated in the accumulated charge regime, thereby reducing the nonlinearity of the parasitic off-state source-to-drain capacitance of the SOI MOSFET. In RF switch circuits implemented with the improved SOI MOSFET devices, harmonic and intermodulation distortion is reduced by removing or otherwise controlling the accumulated charge when the SOI MOSFET operates in an accumulated charge regime.

Abstract: A novel RF switch for switching radio frequency (RF) signals is disclosed. The RF switch may comprise both enhancement and depletion mode field-effect transistors (E-FETs and D-FETs) implemented as a monolithic integrated circuit (IC) on a silicon-on-insulator (SOI) substrate. The disclosed RF switch, with a novel bleeder circuit, may be used in RF applications wherein a selected switch state and performance are required when the switch and bleeder circuits are not provided with operating power (i.e., when the switch and bleeder circuits are “unpowered”).

Abstract: A silicon-on-insulator (SOI) RF switch adapted for improved power handling capability using a reduced number of transistors is described. In one embodiment, an RF switch includes pairs of switching and shunting stacked transistor groupings to selectively couple RF signals between a plurality of input/output nodes and a common RF node. The switching and shunting stacked transistor groupings comprise one or more MOSFET transistors connected together in a “stacked” or serial configuration. In one embodiment, the transistor groupings are “symmetrically” stacked in the RF switch (i.e., the transistor groupings all comprise an identical number of transistors). In another embodiment, the transistor groupings are “asymmetrically” stacked in the RF switch (i.e., at least one transistor grouping comprises a number of transistors that is unequal to the number of transistors comprising at least one other transistor grouping).

Abstract: An RF switching circuit adapted to cancel selected harmonic signals. An unwanted harmonic signal Sh1 at a selected harmonic frequency Fsh of an operating frequency Fo exists in a signal Si conducted by the switching circuit, possibly produced by the switching circuit due to conduction through a first nonlinear impedance Znl(1). A compensating harmonic signal Sh2 is therefore generated by conduction via a nonlinear impedance Znl(2). Znl(1) may be due to parasitic conduction by “off” switching elements, while Znl(2) may be due to conduction by an “on” FET. The amplitude and/or phasing of Sh2 may be adjusted by selecting components for a network coupling Znl(2) to the conducted signal Si, such that Sh2 substantially cancels Sh1 across a target range of input power.

Abstract: The present invention relates to a transceiver device having a switching arrangement and to a method of improving such a switching arrangement, wherein an input impedance of a duplexer means, as seen by a switching means (10) at a predetermined frequency, is transformed to a predetermined maximum or a minimum value. The switching means is used to selectively connect an antenna port to a transmitting and receiving path which leads to the duplexer means (14). The transformation of the input impedance can be achieved by providing a phase shifter (20) between a switching means (10) and the duplexer means (14). Thereby, the phase of the impedance can be optimized for minimal intermodulation distortion and to relax switch linearity requirements, so that the switching means (10) can be used for switching duplex signals.

Abstract: A charge pump method and apparatus is described having various aspects. Noise injection from a charge pump to other circuits may be reduced by limiting both positive and negative clock transition rates, as well as by limiting drive currents within clock generator driver circuits, and also by increasing a control node AC impedance of certain transfer capacitor coupling switches. A single-phase clock may be used to control as many as all active switches within a charge pump, and capacitive coupling may simplify biasing and timing for clock signals controlling transfer capacitor coupling switches. Any combination of such aspects of the method or apparatus may be employed to quiet and/or simplify charge pump designs over a wide range of charge pump architectures.