Patents by Inventor Dylan W. Southern

Dylan W. Southern has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11848299
    Abstract: Systems and methods for a semiconductor device having an edge-notched substrate are provided. The device generally includes a substrate having a front side, a backside having substrate contacts, and an inward notch at an edge of the substrate. The device includes a die having an active side attached to the front side of the substrate and positioned such that bond pads of the die are accessible from the backside of the substrate through the inward notch. The device includes wire bonds routed through the inward notch and electrically coupling the bond pads of the die to the substrate contacts. The device may further include a second die having an active side attached to the backside of the first die and positioned laterally offset from the first die such that the second bond pads are accessible by wire bonds around the edge of the first die and through the inward notch.
    Type: Grant
    Filed: October 24, 2022
    Date of Patent: December 19, 2023
    Assignee: Micron Technology, Inc.
    Inventors: Owen R. Fay, Madison E. Wale, James L Voelz, Dylan W. Southern
  • Publication number: 20230145473
    Abstract: Semiconductor devices having redistribution structures, and associated systems and methods, are disclosed herein. In some embodiments, a semiconductor assembly comprises a die stack including a plurality of semiconductor dies, and a routing substrate mounted on the die stack. The routing substrate includes an upper surface having a redistribution structure. The semiconductor assembly also includes a plurality of electrical connectors coupling the redistribution structure to at least some of the semiconductor dies. The semiconductor assembly further includes a controller die mounted on the routing substrate. The controller die includes an active surface that faces the upper surface of the routing substrate and is electrically coupled to the redistribution structure, such that the routing substrate and the semiconductor dies are electrically coupled to the controller die via the redistribution structure.
    Type: Application
    Filed: January 6, 2023
    Publication date: May 11, 2023
    Inventors: Owen R. Fay, Madison E. Wale, James L. Voelz, Dylan W. Southern, Dustin L. Holloway
  • Publication number: 20230045144
    Abstract: Systems and methods for a semiconductor device having an edge-notched substrate are provided. The device generally includes a substrate having a front side, a backside having substrate contacts, and an inward notch at an edge of the substrate. The device includes a die having an active side attached to the front side of the substrate and positioned such that bond pads of the die are accessible from the backside of the substrate through the inward notch. The device includes wire bonds routed through the inward notch and electrically coupling the bond pads of the die to the substrate contacts. The device may further include a second die having an active side attached to the backside of the first die and positioned laterally offset from the first die such that the second bond pads are accessible by wire bonds around the edge of the first die and through the inward notch.
    Type: Application
    Filed: October 24, 2022
    Publication date: February 9, 2023
    Inventors: Owen R. Fay, Madison E. Wale, James L. Voelz, Dylan W. Southern
  • Patent number: 11552045
    Abstract: Semiconductor devices having redistribution structures, and associated systems and methods, are disclosed herein. In some embodiments, a semiconductor assembly comprises a die stack including a plurality of semiconductor dies, and a routing substrate mounted on the die stack. The routing substrate includes an upper surface having a redistribution structure. The semiconductor assembly also includes a plurality of electrical connectors coupling the redistribution structure to at least some of the semiconductor dies. The semiconductor assembly further includes a controller die mounted on the routing substrate. The controller die includes an active surface that faces the upper surface of the routing substrate and is electrically coupled to the redistribution structure, such that the routing substrate and the semiconductor dies are electrically coupled to the controller die via the redistribution structure.
    Type: Grant
    Filed: November 20, 2020
    Date of Patent: January 10, 2023
    Assignee: Micron Technology, Inc.
    Inventors: Owen R. Fay, Madison E. Wale, James L. Voelz, Dylan W. Southern, Dustin L. Holloway
  • Patent number: 11482504
    Abstract: Systems and methods for a semiconductor device having an edge-notched substrate are provided. The device generally includes a substrate having a front side, a backside having substrate contacts, and an inward notch at an edge of the substrate. The device includes a die having an active side attached to the front side of the substrate and positioned such that bond pads of the die are accessible from the backside of the substrate through the inward notch. The device includes wire bonds routed through the inward notch and electrically coupling the bond pads of the die to the substrate contacts. The device may further include a second die having an active side attached to the backside of the first die and positioned laterally offset from the first die such that the second bond pads are accessible by wire bonds around the edge of the first die and through the inward notch.
    Type: Grant
    Filed: September 16, 2020
    Date of Patent: October 25, 2022
    Assignee: Micron Technology, Inc.
    Inventors: Owen R. Fay, Madison E. Wale, James L. Voelz, Dylan W. Southern
  • Publication number: 20220084977
    Abstract: Systems and methods for a semiconductor device having an edge-notched substrate are provided. The device generally includes a substrate having a front side, a backside having substrate contacts, and an inward notch at an edge of the substrate. The device includes a die having an active side attached to the front side of the substrate and positioned such that bond pads of the die are accessible from the backside of the substrate through the inward notch. The device includes wire bonds routed through the inward notch and electrically coupling the bond pads of the die to the substrate contacts. The device may further include a second die having an active side attached to the backside of the first die and positioned laterally offset from the first die such that the second bond pads are accessible by wire bonds around the edge of the first die and through the inward notch.
    Type: Application
    Filed: September 16, 2020
    Publication date: March 17, 2022
    Inventors: Owen R. Fay, Madison E. Wale, James L. Voelz, Dylan W. Southern
  • Publication number: 20220052021
    Abstract: Semiconductor devices having redistribution structures, and associated systems and methods, are disclosed herein. In some embodiments, a semiconductor assembly comprises a die stack including a plurality of semiconductor dies, and a routing substrate mounted on the die stack. The routing substrate includes an upper surface having a redistribution structure. The semiconductor assembly also includes a plurality of electrical connectors coupling the redistribution structure to at least some of the semiconductor dies. The semiconductor assembly further includes a controller die mounted on the routing substrate. The controller die includes an active surface that faces the upper surface of the routing substrate and is electrically coupled to the redistribution structure, such that the routing substrate and the semiconductor dies are electrically coupled to the controller die via the redistribution structure.
    Type: Application
    Filed: November 20, 2020
    Publication date: February 17, 2022
    Inventors: Owen R. Fay, Madison E. Wale, James L. Voelz, Dylan W. Southern, Dustin L. Holloway
  • Publication number: 20220051962
    Abstract: Semiconductor device assemblies are provided with a layer of thermal barrier material between a first semiconductor device (e.g., a logic die or other heat-generating device) and a second semiconductor device (e.g., a memory die or other device whose performance may be improved in a lower-temperature environment). The layer of thermal barrier material can reduce the conduction of the heat generated by the first semiconductor device towards the second semiconductor device. The assemblies can also include one or more thermally conductive structures disposed in the substrate under the first semiconductor device and configured to conduct the heat from the first semiconductor device out of the semiconductor device assembly.
    Type: Application
    Filed: August 12, 2020
    Publication date: February 17, 2022
    Inventors: Owen R. Fay, Madison E. Wale, James L. Voelz, Dylan W. Southern