Patents by Inventor Dz-Ching (Roy) Ju

Dz-Ching (Roy) Ju has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7694290
    Abstract: A method and system to optimize throughput of executable program code are provided. The system comprises a profiler to receive a representation of a plurality of functions, an aggregator, and a mapper to map the plurality of aggregates to a plurality of processors. The aggregator may be configured to create an aggregate for each function from the plurality of functions thereby creating a plurality of aggregates, choose an optimization action between grouping and duplication based on the number of aggregates in the plurality of aggregates, the number of available processing elements (PEs), and execution time of each aggregate, and perform the chosen optimization action.
    Type: Grant
    Filed: September 1, 2005
    Date of Patent: April 6, 2010
    Assignee: Intel Corporation
    Inventors: Lixia Liu, Dz-ching (Roy) Ju, Michael K. Chen
  • Patent number: 7689867
    Abstract: Techniques that may be utilized in a multiprocessor system are described. In one embodiment, one or more signals are generated to indicate that a breakpoint instruction is executed by one of the plurality of processors in the multiprocessor system. For example, a signal may be generated to indicate whether a processor is to be halted once it receives the a signal that indicates the breakpoint instruction. Other embodiments are also disclosed.
    Type: Grant
    Filed: June 9, 2005
    Date of Patent: March 30, 2010
    Assignee: Intel Corporation
    Inventors: Mark B. Rosenbluth, Xiao-Feng Li, Dz-ching (Roy) Ju, Aaron R. Kunze
  • Patent number: 7480768
    Abstract: There is provided a method and apparatus to reduce access to shared data storage. The apparatus analyzes a multithreaded application and generates metadata that is utilized to optimize the multithreaded application that executes on multiple processing elements.
    Type: Grant
    Filed: September 30, 2005
    Date of Patent: January 20, 2009
    Assignee: Intel Corporation
    Inventors: Xiao-Feng Li, Haibo (Jason) Lin, Dz-ching (Roy) Ju
  • Patent number: 7469404
    Abstract: Operands may be assigned to physical registers within partitioned register banks by identifying possible candidate register banks for an operand. Prior to allocation of the operand to a candidate register bank, conflicts between candidate register banks, if any, may be identified and resolved.
    Type: Grant
    Filed: June 30, 2004
    Date of Patent: December 23, 2008
    Assignee: Intel Corporation
    Inventors: Junchao Zhang, Dz-ching (Roy) Ju, Ruiqi Lian, Guei-Yuan Lueh, Zhaoqing Zhang
  • Patent number: 7120775
    Abstract: A method for an allocation of stacked registers for Intel's ItaniumĀ® processor includes a three step process. Step I determines an intra-procedural stacked register usage by a program having a plurality of procedures. In step II, the disclosed method performs an inter-procedural analysis to assign quota of stacked register usage to every procedure. In step III, each procedure is allocated stacked register usage based on the quota assignments of step II.
    Type: Grant
    Filed: December 29, 2003
    Date of Patent: October 10, 2006
    Assignee: Intel Corporation
    Inventors: Yang Liu, Sun Chan, Guangrong Gao, Dz-Ching (Roy) Ju, Guei-Yuan Lueh, Zhaoqing Zhang