Patents by Inventor Dzung H. Nguyen
Dzung H. Nguyen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9423969Abstract: Methods for sensing, method for programming, memory devices, and memory systems are disclosed. In one such method for sensing, a counting circuit generates a count output and a translated count output. The count output is converted into a time varying voltage that biases a word line coupled to memory cells being sensed. Target data for each memory cell is stored in a data cache associated with that particular memory cell. When it is detected that a memory cell has turned on, the translated count output associated with the count output that is indicative of the voltage level that turned on the memory cell is compared to the target data. The comparison determines the state of the memory cell.Type: GrantFiled: August 17, 2015Date of Patent: August 23, 2016Assignee: Micron Technology, Inc.Inventors: Jonathan Pabustan, Vishal Sarin, Dzung H. Nguyen
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Publication number: 20150355849Abstract: Methods for sensing, method for programming, memory devices, and memory systems are disclosed. In one such method for sensing, a counting circuit generates a count output and a translated count output. The count output is converted into a time varying voltage that biases a word line coupled to memory cells being sensed. Target data for each memory cell is stored in a data cache associated with that particular memory cell. When it is detected that a memory cell has turned on, the translated count output associated with the count output that is indicative of the voltage level that turned on the memory cell is compared to the target data. The comparison determines the state of the memory cell.Type: ApplicationFiled: August 17, 2015Publication date: December 10, 2015Applicant: MICRON TECHNOLOGY, INC.Inventors: Jonathan Pabustan, Vishal Sarin, Dzung H. Nguyen
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Patent number: 9165681Abstract: In an embodiment, a defective memory block is replaced with a non-defective memory block, and a voltage-delay correction is applied to the non-defective memory block that replaces the defective memory block based on the actual location of the non-defective memory block.Type: GrantFiled: March 25, 2014Date of Patent: October 20, 2015Assignee: Micron Technology, Inc.Inventors: Vishal Sarin, Dzung H. Nguyen, William H. Radke
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Patent number: 9123423Abstract: Methods for sensing, method for programming, memory devices, and memory systems are disclosed. In one such method for sensing, a counting circuit generates a count output and a translated count output. The count output is converted into a time varying voltage that biases a word line coupled to memory cells being sensed. Target data for each memory cell is stored in a data cache associated with that particular memory cell. When it is detected that a memory cell has turned on, the translated count output associated with the count output that is indicative of the voltage level that turned on the memory cell is compared to the target data. The comparison determines the state of the memory cell.Type: GrantFiled: December 12, 2013Date of Patent: September 1, 2015Assignee: Micron Technology, Inc.Inventors: Jonathan Pabustan, Vishal Sarin, Dzung H. Nguyen
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Publication number: 20140204693Abstract: In an embodiment, a defective memory block is replaced with a non-defective memory block, and a voltage-delay correction is applied to the non-defective memory block that replaces the defective memory block based on the actual location of the non-defective memory block.Type: ApplicationFiled: March 25, 2014Publication date: July 24, 2014Applicant: MICRON TECHNOLOGY, INC.Inventors: Vishal Sarin, Dzung H. Nguyen, William H. Radke
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Patent number: 8730734Abstract: The present disclosure includes methods, devices, and systems for access line biasing. One embodiment includes selecting, using a controller external to the memory device, a particular access line dependent biasing scheme and corresponding bias conditions for use in performing an access operation on an array of memory cells of the memory device, and performing the access operation using the selected particular access line dependent biasing scheme and corresponding bias conditions. In one or more embodiments, the selected particular access line dependent biasing scheme and corresponding bias conditions is selected by the controller external to the memory device based, at least partially, on a target access line of the array.Type: GrantFiled: January 21, 2013Date of Patent: May 20, 2014Assignee: Micron Technology, Inc.Inventor: Dzung H. Nguyen
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Patent number: 8705299Abstract: An apparatus has a controller. The controller is configured to address a non-defective memory block of a sequence of memory blocks in place of a defective memory block of the sequence of memory blocks such that the non-defective memory block replaces the defective memory block. The non-defective memory block is a proximate non-defective memory block following the defective memory block in the sequence of memory blocks that is available to replace the defective memory block. The controller is configured to apply a voltage-delay correction to the non-defective memory block that replaces the defective memory block based on the actual location of the non-defective memory block.Type: GrantFiled: May 15, 2013Date of Patent: April 22, 2014Assignee: Micron Technology, Inc.Inventors: Vishal Sarin, Dzung H. Nguyen, William H. Radke
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Publication number: 20140104956Abstract: Methods for sensing, method for programming, memory devices, and memory systems are disclosed. In one such method for sensing, a counting circuit generates a count output and a translated count output. The count output is converted into a time varying voltage that biases a word line coupled to memory cells being sensed. Target data for each memory cell is stored in a data cache associated with that particular memory cell. When it is detected that a memory cell has turned on, the translated count output associated with the count output that is indicative of the voltage level that turned on the memory cell is compared to the target data. The comparison determines the state of the memory cell.Type: ApplicationFiled: December 12, 2013Publication date: April 17, 2014Applicant: MICRON TECHNOLOGY, INC.Inventors: Jonathan Pabustan, Vishal Sarin, Dzung H. Nguyen
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Patent number: 8611156Abstract: Methods for sensing, method for programming, memory devices, and memory systems are disclosed. In one such method for sensing, a counting circuit generates a count output and a translated count output. The count output is converted into a time varying voltage that biases a word line coupled to memory cells being sensed. Target data for each memory cell is stored in a data cache associated with that particular memory cell. When it is detected that a memory cell has turned on, the translated count output associated with the count output that is indicative of the voltage level that turned on the memory cell is compared to the target data. The comparison determines the state of the memory cell.Type: GrantFiled: July 17, 2012Date of Patent: December 17, 2013Assignee: Micron Technology, Inc.Inventors: Jonathan Pabustan, Vishal Sarin, Dzung H. Nguyen
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Patent number: 8593870Abstract: A method of reading sequential pages of flash memory from alternating memory blocks comprises loading data from a first page into a first primary data cache and a second page into a second primary data cache simultaneously, the first and second pages loaded from different blocks of flash memory. Data from the first primary data cache is stored in a first secondary data cache, and data from the second primary data cache is stored in a second secondary data cache. Data is sequentially provided from the first and second secondary data caches by a multiplexer coupled to the first and second data caches.Type: GrantFiled: May 7, 2012Date of Patent: November 26, 2013Assignee: Round Rock Research, LLCInventors: Dzung H. Nguyen, Frankie F. Roohparvar
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Publication number: 20130250707Abstract: An apparatus has a controller. The controller is configured to address a non-defective memory block of a sequence of memory blocks in place of a defective memory block of the sequence of memory blocks such that the non-defective memory block replaces the defective memory block. The non-defective memory block is a proximate non-defective memory block following the defective memory block in the sequence of memory blocks that is available to replace the defective memory block. The controller is configured to apply a voltage-delay correction to the non-defective memory block that replaces the defective memory block based on the actual location of the non-defective memory block.Type: ApplicationFiled: May 15, 2013Publication date: September 26, 2013Applicant: Micron Technology, Inc.Inventors: Sarin Vishal, Dzung H. Nguyen, William H. Radke
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Patent number: 8520436Abstract: A target memory cell of a memory device is programmed by applying a programming voltage to a word line that includes the target memory cell, determining whether the target memory cell is programmed, and increasing the programming voltage by a step voltage if it is determined that the target memory cell is not programmed. An initial programming voltage and the step voltage are each selectable after fabrication of the memory device.Type: GrantFiled: May 4, 2012Date of Patent: August 27, 2013Assignee: Round Rock Research, LLCInventors: Dzung H. Nguyen, Benjamin Louie, Hagop A. Nazarian, Aaron Yip, Jin-Man Han
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Patent number: 8446787Abstract: Electronic systems and methods of operating memory devices are provided. In one such embodiment, a memory device receives an external address that addresses a non-defective memory block of a sequence of memory blocks of the memory device in place of a defective memory block of the sequence of memory blocks such that the non-defective memory block replaces the defective memory block. The non-defective memory block is proximate non-defective memory block following the defective memory block in the sequence of memory blocks that is available to replace the defective memory block.Type: GrantFiled: November 20, 2008Date of Patent: May 21, 2013Assignee: Micron Technology, Inc.Inventors: Vishal Sarin, Dzung H. Nguyen, William H. Radke
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Patent number: 8391080Abstract: In erasing a memory block of memory cells, a semiconductor tub that contains a memory block to be erased can be biased with a high, positive voltage. The control gates of the memory cells that make up the memory block can be biased with a negative voltage. An erase verification can then be performed to determine if the memory block has been successfully erased. If the memory block has not been erased, the erase operation of biasing the tub with the positive voltage and the control gates with the negative voltage can be repeated until the erase verification is successful.Type: GrantFiled: October 19, 2011Date of Patent: March 5, 2013Assignee: Micron Technology, Inc.Inventors: Vishal Sarin, Dzung H. Nguyen
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Patent number: 8358540Abstract: The present disclosure includes methods, devices, and systems for access line biasing. One embodiment includes selecting, using a controller external to the memory device, a particular access line dependent biasing scheme and corresponding bias conditions for use in performing an access operation on an array of memory cells of the memory device, and performing the access operation using the selected particular access line dependent biasing scheme and corresponding bias conditions. In one or more embodiments, the selected particular access line dependent biasing scheme and corresponding bias conditions is selected by the controller external to the memory device based, at least partially, on a target access line of the array.Type: GrantFiled: January 13, 2010Date of Patent: January 22, 2013Assignee: Micron Technology, Inc.Inventor: Dzung H. Nguyen
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Publication number: 20120281480Abstract: Methods for sensing, method for programming, memory devices, and memory systems are disclosed. In one such method for sensing, a counting circuit generates a count output and a translated count output. The count output is converted into a time varying voltage that biases a word line coupled to memory cells being sensed. Target data for each memory cell is stored in a data cache associated with that particular memory cell. When it is detected that a memory cell has turned on, the translated count output associated with the count output that is indicative of the voltage level that turned on the memory cell is compared to the target data. The comparison determines the state of the memory cell.Type: ApplicationFiled: July 17, 2012Publication date: November 8, 2012Inventors: Jonathan Pabustan, Vishal Sarin, Dzung H. Nguyen
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Patent number: 8295109Abstract: Controllers and memory devices are provided. In an embodiment, a controller is configured to address a non-defective column of memory cells of a memory device in place of a defective column of memory cells of the memory device in response to receiving an address of the defective column of memory cells from the memory device. In another embodiment, a memory device has columns of memory cells and is configured to receive an external address that addresses a non-defective column of memory cells of a sequence of columns of memory cells of the memory device in place of a defective column of memory cells of the sequence of columns of memory cells such that the non-defective column replaces the defective column. The non-defective column is a proximate non-defective column following the defective column in the sequence of columns that is available to replace the defective column.Type: GrantFiled: January 31, 2011Date of Patent: October 23, 2012Assignee: Micron Technology, Inc.Inventors: Vishal Sarin, William H. Radke, Dzung H. Nguyen
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Publication number: 20120221779Abstract: A target memory cell of a memory device is programmed by applying a programming voltage to a word line that includes the target memory cell, determining whether the target memory cell is programmed, and increasing the programming voltage by a step voltage if it is determined that the target memory cell is not programmed. An initial programming voltage and the step voltage are each selectable after fabrication of the memory device.Type: ApplicationFiled: May 4, 2012Publication date: August 30, 2012Applicant: ROUND ROCK RESEARCH, LLCInventors: Dzung H. Nguyen, Benjamin Louie, Hagop A. Nazarian, Aaron Yip, Jin-Man Han
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Publication number: 20120221780Abstract: A method of reading sequential pages of flash memory from alternating memory blocks comprises loading data from a first page into a first primary data cache and a second page into a second primary data cache simultaneously, the first and second pages loaded from different blocks of flash memory. Data from the first primary data cache is stored in a first secondary data cache, and data from the second primary data cache is stored in a second secondary data cache. Data is sequentially provided from the first and second secondary data caches by a multiplexer coupled to the first and second data caches.Type: ApplicationFiled: May 7, 2012Publication date: August 30, 2012Applicant: Round Rock Research, LLCInventors: Dzung H. Nguyen, Frankie F. Roohparvar
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Patent number: 8243523Abstract: Methods for sensing, method for programming, memory devices, and memory systems are disclosed. In one such method for sensing, a counting circuit generates a count output and a translated count output. The count output is converted into a time varying voltage that biases a word line coupled to memory cells being sensed. Target data for each memory cell is stored in a data cache associated with that particular memory cell. When it is detected that a memory cell has turned on, the translated count output associated with the count output that is indicative of the voltage level that turned on the memory cell is compared to the target data. The comparison determines the state of the memory cell.Type: GrantFiled: March 9, 2010Date of Patent: August 14, 2012Assignee: Micron Technology, Inc.Inventors: Jonathan Pabustan, Vishal Sarin, Dzung H. Nguyen