Patents by Inventor E. James Cotriss

E. James Cotriss has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Method and apparatus for dynamically controlling the timing of signals in automatic test systems
    Patent number: 4820944
    Abstract: Apparatus for delaying an electrical signal includes a sequence of stages, each for delaying the signal. A coarser stage delays the signal by multiples of a predetermined fundamental delay interval and a finer stage provides for fine adjustment of the delay. The fine stage includes an integral number N of delay elements, the total providing a delay interval greater than the fundamental delay interval, whereby the fine delay intervals compensate for fabrication tolerances to enable accurate calibration of the combined system by post-fabrication measurement. In one implementation each delay stage includes a tapped transmission line to provide delay intervals, in another a ramp generator is used.
    Type: Grant
    Filed: October 28, 1986
    Date of Patent: April 11, 1989
    Assignee: Schlumberger Systems & Services, Inc.
    Inventors: Richard F. Herlein, Jeffrey A. Davis, E. James Cotriss
  • Method and apparatus for dynamically controlling the timing of signals in automatic test systems
    Patent number: 4675562
    Abstract: Apparatus for delaying an electrical signal includes a sequence of stages, each for delaying the signal. A coarser stage delays the signal by multiples of a predetermined fundamental delay interval and a finer stage provides for fine adjustment of the delay. The fine stage includes an integral number N of delay elements, the total providing a delay interval greater than the fundamental delay interval, whereby the fine delay intervals compensate for fabrication tolerances to enable accurate calibration of the combined system by post-fabrication measurement. In one implementation each delay stage includes a tapped transmission line to provide delay intervals, in another a ramp generator is used.
    Type: Grant
    Filed: May 17, 1984
    Date of Patent: June 23, 1987
    Assignee: Fairchild Semiconductor Corporation
    Inventors: Richard F. Herlein, Jeffrey A. Davis, E. James Cotriss