Patents by Inventor E. William Cowell, III

E. William Cowell, III has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210116888
    Abstract: Implementations of a system configured for operation of a motor may include a motor controller coupled with a memory, the motor controller configured to be coupled with a motor. The motor controller may be configured to store a set of control parameters in the memory, the set of control parameters generated using a deep reinforcement learning agent and data associated with one or more parameters of the motor. The set of control parameters may be configured to define an optimized operating area for the motor.
    Type: Application
    Filed: September 30, 2020
    Publication date: April 22, 2021
    Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventors: Avery Joseph ROY, E. William COWELL, III, Luiz Henrique STIVAL, Tirthajyoti SARKAR, Robert L. BRENNAN
  • Publication number: 20200387766
    Abstract: A data logger system is disclosed. Specific implementations include a flexible data logger system. The data logger system may include a flexible substrate and a radio-frequency identification (RFID) communications module coupled to the flexible substrate. The RFID communications module may include an antenna coupled with a RFID chip. The data logger system may also include a microprocessor and a memory module coupled to the flexible substrate, the microprocessor and the memory module electrically coupled with the RFID communications module. The data logger system may also include a temperature sensor coupled to the flexible substrate, the temperature sensor electrically coupled with the microprocessor and memory module, and a power source coupled to the flexible substrate, the power source electrically coupled with the microprocessor, the memory module, the temperature sensor, and the RFID communications module.
    Type: Application
    Filed: February 11, 2020
    Publication date: December 10, 2020
    Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventors: Douglas Cameron SEITZ, Ernest Gil ESTILLER, Walker MITCHELL, E. William COWELL, III
  • Patent number: 10234734
    Abstract: A physical layout for a circuit using amorphous metal non-linear resistors as active devices for an in-plane switching liquid crystal display sub-pixel is provided. The lower interconnect of the two amorphous metal non-linear resistors and the lower electrode of the storage capacitor may be concurrently deposited and patterned. The area of the storage capacitor is defined by the overlap of the data signal inter-connect and the storage capacitor lower electrode, which is easily modified through the size of the lower electrode and/or the size of the data signal interconnect where it overlaps the lower electrode and does not degrade the aperture ratio of the pixel. Two embodiments of sub-pixel circuits are described. One, which employs a select line bridge, enables the use of full dot inversion of the image data. The second only allows row inversion of the image data.
    Type: Grant
    Filed: July 21, 2016
    Date of Patent: March 19, 2019
    Assignee: Oregon State University
    Inventors: E. William Cowell, III, John Newton
  • Publication number: 20180331045
    Abstract: Implementations of a via for a semiconductor devices may include a first tungsten layer deposited conformally within the via, and may be recessed within the via, and a second tungsten layer deposited into the recess over the first tungsten layer. A plane formed by the second tungsten layer may be substantially parallel with a plane aligned substantially perpendicularly with a longest dimension of the via viewed in cross section.
    Type: Application
    Filed: March 14, 2018
    Publication date: November 15, 2018
    Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventors: Eric AMEELE, E. William COWELL, III
  • Publication number: 20180203309
    Abstract: A physical layout for a circuit using amorphous metal non-linear resistors as active devices for an in-plane switching liquid crystal display sub-pixel is provided. The lower interconnect of the two amorphous metal non-linear resistors and the lower electrode of the storage capacitor may be concurrently deposited and patterned. The area of the storage capacitor is defined by the overlap of the data signal inter-connect and the storage capacitor lower electrode, which is easily modified through the size of the lower electrode and/or the size of the data signal interconnect where it overlaps the lower electrode and does not degrade the aperture ratio of the pixel. Two embodiments of sub-pixel circuits are described. One, which employs a select line bridge, enables the use of full dot inversion of the image data. The second only allows row inversion of the image data.
    Type: Application
    Filed: July 21, 2016
    Publication date: July 19, 2018
    Inventors: E. William Cowell III, John Newton
  • Patent number: 9099230
    Abstract: An amorphous metal thin-film non-linear resistor (AMNR) is provided. The AMNR is an electronic device possessing symmetric non-linear current-voltage (I-V) characteristics, an exemplary configuration of which may comprise three sequentially deposited layers which include a lower amorphous metal thin-film (AMTF) interconnect, a thin-film insulator located on top of the AMTF interconnect, and two upper conductive contacts located on top of the insulator and disposed in the same physical plane.
    Type: Grant
    Filed: October 30, 2013
    Date of Patent: August 4, 2015
    Assignee: STATE OF OREGON ACTING BY AND THROUGH THE STATE BOARD OF HIGHER EDUCATION ON BEHALF OF OREGON STATE UNIVESITY
    Inventor: E. William Cowell, III
  • Publication number: 20140368310
    Abstract: An amorphous metal thin-film non-linear resistor (AMNR) is provided. The AMNR is an electronic device possessing symmetric non-linear current-voltage (I-V) characteristics, an exemplary configuration of which may comprise three sequentially deposited layers which include a lower amorphous metal thin-film (AMTF) interconnect, a thin-film insulator located on top of the AMTF interconnect, and two upper conductive contacts located on top of the insulator and disposed in the same physical plane.
    Type: Application
    Filed: October 30, 2013
    Publication date: December 18, 2014
    Inventor: E. William Cowell, III
  • Publication number: 20140302310
    Abstract: Nanolaminates comprised of alternating layers of amorphous, multi-component metallic films (AMMFs) and metal oxide films are disclosed as metamaterials whose physical properties can be engineered to customize the resulting electrical, average dielectric, and thermal properties. In certain configurations using AMMFs, the construct may be an optical or an electronic element, such a metal-insulator-metal (MIM) diode, for example.
    Type: Application
    Filed: March 19, 2012
    Publication date: October 9, 2014
    Applicant: The State of Oregon Acting by and Through the State Board of Higher Education on Behalf of Or...
    Inventors: E. William Cowell, III, John F. Wager, Douglas A. Keszler, Nicholas A. Kuhta, Christopher C. Knutson
  • Patent number: 8822978
    Abstract: An electronic structure comprising: (a) a first metal layer; (b) a second metal layer; (c) and at least one insulator layer located between the first metal layer and the second metal layer, wherein at least one of the metal layers comprises an amorphous multi-component metallic film. In certain embodiments, the construct is a metal-insulator-metal (MIM) diode.
    Type: Grant
    Filed: April 23, 2013
    Date of Patent: September 2, 2014
    Assignee: The State of Oregon Acting by and through...
    Inventors: E. William Cowell, III, John F. Wager, Brady J. Gibbons, Douglas A. Keszler
  • Patent number: 8436337
    Abstract: An electronic structure comprising: (a) a first metal layer; (b) a second metal layer; (c) and at least one insulator layer located between the first metal layer and the second metal layer, wherein at least one of the metal layers comprises an amorphous multi-component metallic film. In certain embodiments, the construct is a metal-insulator-metal (MIM) diode.
    Type: Grant
    Filed: May 10, 2010
    Date of Patent: May 7, 2013
    Assignee: The State of Oregon Acting By and Through The State Board of Higher Education on Behalf of Oregon State Unitiversity
    Inventors: E. William Cowell, III, John F. Wager, Brady J. Gibbons, Douglas A. Keszler
  • Publication number: 20100289005
    Abstract: An electronic structure comprising: (a) a first metal layer; (b) a second metal layer; (c) and at least one insulator layer located between the first metal layer and the second metal layer, wherein at least one of the metal layers comprises an amorphous multi-component metallic film. In certain embodiments, the construct is a metal-insulator-metal (MIM) diode.
    Type: Application
    Filed: May 10, 2010
    Publication date: November 18, 2010
    Inventors: E. William Cowell, III, John F. Wager, Brady J. Gibbons, Douglas A. Keszler