Abstract: An integrated switching regulator device has a switching mode regulator comprising an input voltage source and a switching circuit coupled to the input voltage source configured to generate a pulsed voltage from the input voltage. A low pass filter is coupled to the switching regulator and is configured to filter the pulsed voltage to provide a regulated voltage to a load. The low pass filter comprises at least two LC stages, wherein the first LC stage comprises an air cored inductor and each subsequent LC stage comprises a non-air cored inductor. The switching circuit comprises two or more switching elements configurable to operate at a switching frequency of several megahertz.

Abstract: A switched mode power supply converter comprises a circuit pulse matching circuit configured to negate output voltage disturbance or noise during switching operation of a power conversion. The current pulse matching circuit input is driven by, or from, a power converter switch node of the switched mode power supply converter. The current pulse matching circuit comprises a rate-of-voltage change detection circuit driven by the power converter switch node.

Abstract: The invention provides a circuit in a switched mode power supply converter, and method of controlling a circuit. The circuit comprises a current pulse matching circuit configured to negate output voltage disturbance/noise during switching operation of a power conversion. The current pulse matching circuit input is driven by, or from, a power converter switch node of the switched mode power supply converter. The current pulse matching circuit comprises a rate-of-voltage change detection circuit driven by the power converter switch node.

Abstract: The invention describes an integrated switch mode power supply device comprising a switch mode regulator having a switching circuit coupled to an input voltage source to generate an output voltage from the input voltage and the switching circuit comprises at least two wide bandgap switches. An Nth order filter circuit is coupled to the switch mode regulator and configured to filter the output voltage to provide a supply voltage to a load, where N is greater than the integer two wherein the filter circuit comprises a LC or RC low pass filter comprising a plurality of LC or RC filter stages having a first filter stage and a last filter stage.

Abstract: The present invention provides an integrated switching regulator device which comprises a switching mode regulator comprising an input voltage source and a switching circuit coupled to the input voltage source to generate a pulsed voltage from the input voltage, and a low pass filter coupled to the switching regulator configured to filter the pulsed voltage to provide a regulated voltage to a load. The low pass filter comprises at least two LC stages, wherein the first LC stage comprises an air cored inductor and each subsequent LC stage comprises a non-air cored inductor. The switching circuit comprises two or more switching elements configurable to operate at a switching frequency of several MHz.

Abstract: The disclosed subject matter describes herein methods, systems, and non-transitory computer readable media for configuring service networks. According to one aspect, the method includes collecting parameters defining a network service. In another aspect, the method includes generating a plurality of flow interfaces for modeling the network service based on the collected parameters, wherein each of the flow interfaces is associated with a logical device. In another aspect, the method includes generating at least one packet virtual network (PVN) including at least a portion of the plurality of generated flow interfaces. In another aspect, the method includes visually outputting, in a service network user interface, a graphical representation of the network service based on interface connectivities between the plurality of generated flow interfaces.

Abstract: According to one aspect, the disclosed subject matter describes herein a method that includes establishing a plurality of flow interfaces associated with an enterprise service in response to receiving an order request for the enterprise service and sending, for each of the plurality of flow interfaces, flow interface information that specifies parameters associated with the flow interface to a network routing element designated to transport the enterprise service. The method further includes configuring the flow interface on a media interface of the network routing element as specified by the parameters included in the flow interface information and implementing the enterprise service via the configured flow interface.

Abstract: Methods, systems, and computer readable media for modeling packet technology services using a packet virtual network (PVN) are provided. In some aspects, and at a computing platform, a method includes providing a plurality of flow interface objects. Each flow interface object can be associated with a physical device. The method further includes configuring the flow interface objects into a PVN, wherein the flow interface objects represent network devices or device sub-interfaces. The method further includes displaying the PVN for visually modeling an Ethernet and/or a non-Ethernet packet technology service. An exemplary system includes a computing platform having at least one processor and a memory, the computing platform being configured to access a plurality of flow interface objects stored in the memory and a PVN)-modeling module (PVN-MM) for grouping the flow interface objects into a PVN for modeling a service.

Abstract: Incident support routing is described. The Internet is utilized to distribute the received customer support calls among a plurality of customer support agents who may be remotely located and geographically distributed. Voice data to voice-over-IP (VOIP) data packet conversion and VOIP to voice conversion may be utilized to facilitate a customer support call between a customer's telephone and a customer support agent's computer system.

Abstract: A data processing apparatus includes a plurality of processing elements arranged in a single instruction multiple data array. The apparatus includes an instruction controller operable to receive instructions from a plurality of instructions streams, and to transfer instructions from those instructions streams to the processing elements in the array, such that the data processing apparatus is operable to process a plurality of processing threads substantially in parallel with one another. A data transfer controller is provided which is operable to control transfer of data between the internal memory units associated with the processing elements, and memory external to the array.

Abstract: According to one aspect, the disclosed subject matter describes herein a method that includes establishing a plurality of flow interfaces associated with an enterprise service in response to receiving an order request for the enterprise service and sending, for each of the plurality of flow interfaces, flow interface information that specifies parameters associated with the flow interface to a network routing element designated to transport the enterprise service. The method further includes configuring the flow interface on a media interface of the network routing element as specified by the parameters included in the flow interface information and implementing the enterprise service via the configured flow interface.

Abstract: The disclosed subject matter describes herein methods, systems, and non-transitory computer readable media for configuring service networks. According to one aspect, the method includes collecting parameters defining a network service. In another aspect, the method includes generating a plurality of flow interfaces for modeling the network service based on the collected parameters, wherein each of the flow interfaces is associated with a logical device. In another aspect, the method includes generating at least one packet virtual network (PVN) including at least a portion of the plurality of generated flow interfaces. In another aspect, the method includes visually outputting, in a service network user interface, a graphical representation of the network service based on interface connectivities between the plurality of generated flow interfaces.

Abstract: Methods, systems, and computer readable media for modeling packet technology services using a packet virtual network (PVN) are provided. In some aspects, and at a computing platform, a method includes providing a plurality of flow interface objects. Each flow interface object can be associated with a physical device. The method further includes configuring the flow interface objects into a PVN, wherein the flow interface objects represent network devices or device sub-interfaces. The method further includes displaying the PVN for visually modeling an Ethernet and/or a non-Ethernet packet technology service. An exemplary system includes a computing platform having at least one processor and a memory, the computing platform being configured to access a plurality of flow interface objects stored in the memory and a PVN)-modeling module (PVN-MM) for grouping the flow interface objects into a PVN for modeling a service.

Abstract: The present disclosure is directed generally to switch mode power supplies operating in a master-slave configuration and provides a method of synchronizing the PWM outputs from the master and slave devices to avoid problems such, for example, as the generation of beat frequencies.

Abstract: The Application is directed at arrangements at which switch mode power converters share a common load. More particularly, the application provides a masterless arrangement in which no single converter controls the operation of the other converters. This is achieved by an arrangement in which each converter attempts to share its current measurement with other converters through an arbitration scheme employed on a data line, with the winning converter providing a defacto current measurement; for example, a maximum or minimum, to the overall arrangement.

Abstract: A data processing apparatus includes a plurality of processing elements arranged in a single instruction multiple data array. The apparatus includes an instruction controller operable to receive instructions from a plurality of instructions streams, and to transfer instructions from those instructions streams to the processing elements in the array, such that the data processing apparatus is operable to process a plurality of processing threads substantially in parallel with one another. A data transfer controller is provided which is operable to control transfer of data between the internal memory units associated with the processing elements, and memory external to the array.

Abstract: A DPWM (1) has a locked loop (4) which receives an input clock signal and provides an out-of-phase delayed clock at the output of each cell in the loop (35). A multiplexer (5) selects one of the cell outputs at any one time. This allows the DPWM (1) to have a greater resolution which would otherwise be achieved with the same input clock. The resolution is further increased using an interpolator. A programmable module (2) has a control block (20) which interfaces with external CPU and DSP hosts and transmits programmed parameters to finite state machine controllers (15), each providing an independent output.

Abstract: The Application is directed at arrangements at which switch mode power converters share a common load. More particularly, the application provides a masterless arrangement in which no single converter controls the operation of the other converters. This is achieved by an arrangement in which each converter attempts to share its current measurement with other converters through an arbitration scheme employed on a data line, with the winning converter providing a defacto current measurement; for example, a maximum or minimum, to the overall arrangement.

Abstract: A data processing apparatus includes a plurality of processing elements arranged in a single instruction multiple data array for processing data relating to graphical primitives. Vertex data relating to graphical primitives is used as feedback data for the processing elements for additional processing.

Abstract: A parallel data processing apparatus using a SIMD array of processing elements is disclosed. The apparatus makes use of a register in order to control issuance of instructions to the processing elements in the array.