Patents by Inventor Earic Liu

Earic Liu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Method for fabricating asymmetric semiconductor device
    Patent number: 7279387
    Abstract: A method for fabricating an asymmetric semiconductor device is provided. A substrate formed with at least one base structure of MOSFET thereon is provided, wherein the base structure includes a gate over the substrate and a source extension and a drain extension in the substrate beside the gate. The base structure is then treated with an anisotropic annealing source inclined in the source-to-drain direction of the base structure relative to the normal of the substrate, such that one of the source and drain extensions is shadowed by the gate and the other is annealed more.
    Type: Grant
    Filed: February 25, 2005
    Date of Patent: October 9, 2007
    Assignee: United Microelectronics Corp.
    Inventors: Yi-Cheng Chen, Earic Liu, Yu-Kun Chen, Gene Li
  • Method for fabricating asymmetric semiconductor device
    Publication number: 20060194380
    Abstract: A method for fabricating an asymmetric semiconductor device is provided. A substrate formed with at least one base structure of MOSFET thereon is provided, wherein the base structure includes a gate over the substrate and a source extension and a drain extension in the substrate beside the gate. The base structure is then treated with an anisotropic annealing source inclined in the source-to-drain direction of the base structure relative to the normal of the substrate, such that one of the source and drain extensions is shadowed by the gate and the other is annealed more.
    Type: Application
    Filed: February 25, 2005
    Publication date: August 31, 2006
    Inventors: Yi-Cheng Chen, Earic Liu, Yu-Kun Chen, Gene Li