Abstract: A system and method for testing a telephone connection using an interactive telephone response module (ITRM). In one embodiment, the ITRM is connected between the handset and station set of a telephone terminating one end of the connection to be tested. In another embodiment, the ITRM is connected between the telephone connection and the station set of a telephone terminating one end of the connection to be tested. By operating switches on the ITRM, a user can impose predetermined conditions on the connection. A test coordinator located at a test point or other termination in the telephone network then tests the connection under the predetermined conditions.

Abstract: A system and method for testing a telephone connection using an interactive telephone response module (ITRM). In one embodiment, the ITRM is connected between the handset and station set of a telephone terminating one end of the connection to be tested. In another embodiment, the ITRM is connected between the telephone connection and the station set of a telephone terminating one end of the connection to be tested. By operating switches on the ITRM, a user can impose predetermined conditions on the connection. A test coordinator located at a test point or other termination in the telephone network then tests the connection under the predetermined conditions.

Abstract: A system and method for testing a telephone connection using an interactive telephone response module (ITRM). In one embodiment, the ITRM is connected between the handset and station set of a telephone terminating one end of the connection to be tested. In another embodiment, the ITRM is connected between the telephone connection and the station set of a telephone terminating one end of the connection to be tested. By operating switches on the ITRM, a user can impose predetermined conditions on the connection. A test coordinator located at a test point or other termination in the telephone network then tests the connection under the predetermined conditions.

Abstract: Dejitterizer apparatus is disclosed which uses a counter to track the number of bits stored in a 64-bit FIFO buffer. The counter is incremented on a falling edge of pulses of a timing pulse signal, nominally 6.176 Mhz, that coincides with a pulse of a jittered, nominally 1.554 Mhz, clock pulse signal derived from a jittered T1 signal applied to the input of the apparatus. The counter is decremented on the rising edge of pulses of a local clock pulse signal which is derived from the timing pulse signal. The bits are stored in the buffer in response to pulses of the jittered clock pulse signal. Output from the buffer in response to timing pulses derived from the local clock pulse signal is enabled when the counter indicates that the buffer is one-half full. The frequency of the local clock pulse signal is a function of the average frequency of the jittered clock pulse signal over more than sixteen jittered clock periods.