Patents by Inventor Earl Schreyer
Earl Schreyer has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 12107552Abstract: A method includes receiving first data associated with a first power amplifier and second data associated with a second power amplifier. The method also includes generating a first amplitude limiting signal having gain parameters that are based on the first data and the second data. The first data includes at least one of a temperature measurement associated with the first power amplifier, a supply voltage measurement associated with the first power amplifier, a load resistance associated with the first power amplifier, or a gain associated with the first power amplifier. The method further includes modifying an audio signal based at least in part on the first amplitude limiting signal to generate a first gain-adjusted audio signal. The method also includes providing a first output audio signal to the first power amplifier for amplification. The first output audio signal is based at least in part on the first gain-adjusted audio signal.Type: GrantFiled: September 21, 2021Date of Patent: October 1, 2024Assignee: QUALCOMM IncorporatedInventors: Earl Schreyer, Sherif Galal, Sang-Uk Ryu, Hui-ya Liao Nelson, Subbarao Surendra Chakkirala, Shreyas Srikanth Payal
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Patent number: 12028030Abstract: Aspects of the present disclosure relate to apparatus and methods for dynamically adjusting the common-mode input signal of a power amplifier, such as a class-D power amplifier. One example power amplifier circuit generally includes a first amplifier having a signal input and a power input; and a common-mode adjustment circuit having a first input coupled to the power input of the first amplifier, having an output coupled to the signal input of the first amplifier, and being configured to generate a common-mode signal to apply to the signal input of the first amplifier, based on a power supply voltage on the power input of the first amplifier.Type: GrantFiled: January 26, 2022Date of Patent: July 2, 2024Assignee: QUALCOMM IncorporatedInventors: Dongyang Tang, Xinwang Zhang, ChienChung Yang, Earl Schreyer, Sherif Galal
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Patent number: 11876493Abstract: A hybrid class-H/predictive class-G switching amplifier architecture and techniques for amplifying a signal (e.g., an audio signal) using such an architecture. One example method of amplification generally includes delaying an input signal to generate a delayed version of the input signal, amplifying the delayed version of the input signal with an amplifier powered by a boost converter, and selectively controlling the boost converter to operate in at least one of a predictive class-G mode or a class-H mode, based on a magnitude of the input signal.Type: GrantFiled: February 4, 2022Date of Patent: January 16, 2024Assignee: QUALCOMM IncorporatedInventors: Subbarao Surendra Chakkirala, Sherif Galal, Earl Schreyer
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Publication number: 20230300524Abstract: Apparatus and techniques for adaptively adjusting an input current limit for a boost converter supplying power to a load, such as an amplifier. An example circuit for supplying power generally includes a boost converter having an output coupled to a load, and logic configured to adaptively adjust an input current limit for the boost converter based on an estimated output power for the boost converter and to apply the input current limit to the boost converter. One example method for supplying power generally includes converting an input voltage to an output voltage with a boost converter, to power a load for the boost converter, adaptively adjusting an input current limit for the boost converter based on an estimated output power for the boost converter, and applying the input current limit to the boost converter during the converting.Type: ApplicationFiled: March 21, 2022Publication date: September 21, 2023Inventors: Subbarao Surendra CHAKKIRALA, Sherif GALAL, Earl SCHREYER
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Publication number: 20230253934Abstract: A hybrid class-H/predictive class-G switching amplifier architecture and techniques for amplifying a signal (e.g., an audio signal) using such an architecture. One example method of amplification generally includes delaying an input signal to generate a delayed version of the input signal, amplifying the delayed version of the input signal with an amplifier powered by a boost converter, and selectively controlling the boost converter to operate in at least one of a predictive class-G mode or a class-H mode, based on a magnitude of the input signal.Type: ApplicationFiled: February 4, 2022Publication date: August 10, 2023Inventors: Subbarao Surendra CHAKKIRALA, Sherif GALAL, Earl SCHREYER
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Publication number: 20230238925Abstract: Aspects of the present disclosure relate to apparatus and methods for dynamically adjusting the common-mode input signal of a power amplifier, such as a class-D power amplifier. One example power amplifier circuit generally includes a first amplifier having a signal input and a power input; and a common-mode adjustment circuit having a first input coupled to the power input of the first amplifier, having an output coupled to the signal input of the first amplifier, and being configured to generate a common-mode signal to apply to the signal input of the first amplifier, based on a power supply voltage on the power input of the first amplifier.Type: ApplicationFiled: January 26, 2022Publication date: July 27, 2023Inventors: Dongyang TANG, Xinwang ZHANG, ChienChung YANG, Earl SCHREYER, Sherif GALAL
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Publication number: 20230108378Abstract: A method includes receiving first data associated with a first power amplifier and second data associated with a second power amplifier. The method also includes generating a first amplitude limiting signal having gain parameters that are based on the first data and the second data. The first data includes at least one of a temperature measurement associated with the first power amplifier, a supply voltage measurement associated with the first power amplifier, a load resistance associated with the first power amplifier, or a gain associated with the first power amplifier. The method further includes modifying an audio signal based at least in part on the first amplitude limiting signal to generate a first gain-adjusted audio signal. The method also includes providing a first output audio signal to the first power amplifier for amplification. The first output audio signal is based at least in part on the first gain-adjusted audio signal.Type: ApplicationFiled: September 21, 2021Publication date: April 6, 2023Inventors: Earl Schreyer, Sherif Galal, Sang-Uk Ryu, Hui-ya Liao Nelson, Subbarao Surendra Chakkirala, Shreyas Srikanth Payal
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Patent number: 10326405Abstract: An amplifier circuit includes an amplifier and a voltage boost circuit configured to provide a variable supply voltage to the amplifier, the variable supply voltage continuously proportional to an audio input signal, the variable supply voltage configured to follow an output of the amplifier.Type: GrantFiled: May 18, 2017Date of Patent: June 18, 2019Assignee: QUALCOMM IncorporatedInventors: Sherif Galal, Subbarao Surendra Chakkirala, Khaled Abdelfattah, Earl Schreyer
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Publication number: 20180337637Abstract: An amplifier circuit includes an amplifier and a voltage boost circuit configured to provide a variable supply voltage to the amplifier, the variable supply voltage continuously proportional to an audio input signal, the variable supply voltage configured to follow an output of the amplifier.Type: ApplicationFiled: May 18, 2017Publication date: November 22, 2018Inventors: Sherif GALAL, Subbarao Surendra CHAKKIRALA, Khaled ABDELFATTAH, Earl SCHREYER
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Patent number: 9538287Abstract: This document discusses among other things apparatus and methods for protecting circuit elements from harmful voltages. In an example, an apparatus can include an amplifier configured to receive an input signal and to provide an estimate of a first output signal, a peak detector to receive the estimate and to generate a comparison signal that is active when the amplified input signal exceeds a threshold value, and a timer configured to activate a second output signal if the comparison signal is active for at least a selected time period. The timer can include a first digital input and the selected time period can be set using a state of the first digital input.Type: GrantFiled: April 16, 2012Date of Patent: January 3, 2017Assignee: Fairchild Semiconductor CorporationInventor: Earl Schreyer
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Patent number: 9246445Abstract: An apparatus comprises a first audio amplifier circuit configured to provide an analog audio signal and an analog switch circuit including a first input configured to receive the analog audio signal, a second input configured to receive a first digital data signal, and a first output configured to provide one of the digital data signal or the analog audio signal. The apparatus also includes a first feedback circuit coupled to the first audio amplifier circuit and the analog switch circuit output, the feedback circuit configured to bias the first audio amplifier circuit.Type: GrantFiled: February 26, 2014Date of Patent: January 26, 2016Assignee: FAIRCHILD SEMICONDUCTOR CORPORATIONInventors: Julie Lynn Stultz, Earl Schreyer
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Publication number: 20140177876Abstract: An apparatus comprises a first audio amplifier circuit configured to provide an analog audio signal and an analog switch circuit including a first input configured to receive the analog audio signal, a second input configured to receive a first digital data signal, and a first output configured to provide one of the digital data signal or the analog audio signal. The apparatus also includes a first feedback circuit coupled to the first audio amplifier circuit and the analog switch circuit output, the feedback circuit configured to bias the first audio amplifier circuit.Type: ApplicationFiled: February 26, 2014Publication date: June 26, 2014Applicant: Fairchild Semiconductor CorporationInventors: Julie Lynn Stultz, Earl Schreyer
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Patent number: 8699717Abstract: An apparatus comprises a first audio amplifier circuit configured to provide an analog audio signal and an analog switch circuit including a first input configured to receive the analog audio signal, a second input configured to receive a first digital data signal, and a first output configured to provide one of the digital data signal or the analog audio signal. The apparatus also includes a first feedback circuit coupled to the first audio amplifier circuit and the analog switch circuit output, the feedback circuit configured to bias the first audio amplifier circuit.Type: GrantFiled: May 28, 2010Date of Patent: April 15, 2014Assignee: Fairchild Semiconductor CorporationInventors: Julie Lynn Stultz, Earl Schreyer
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Publication number: 20120319776Abstract: This document discusses among other things apparatus and methods for protecting circuit elements from harmful voltages. In an example, an apparatus can include an amplifier configured to receive an input signal and to provide an estimate of a first output signal, a peak detector to receive the estimate and to generate a comparison signal that is active when the amplified input signal exceeds a threshold value, and a timer configured to activate a second output signal if the comparison signal is active for at least a selected time period. The timer can include a first digital input and the selected time period can be set using a state of the first digital input.Type: ApplicationFiled: April 16, 2012Publication date: December 20, 2012Applicant: Fairchild Semiconductor CorporationInventor: Earl Schreyer
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Publication number: 20110293100Abstract: An apparatus comprises a first audio amplifier circuit configured to provide an analog audio signal and an analog switch circuit including a first input configured to receive the analog audio signal, a second input configured to receive a first digital data signal, and a first output configured to provide one of the digital data signal or the analog audio signal. The apparatus also includes a first feedback circuit coupled to the first audio amplifier circuit and the analog switch circuit output, the feedback circuit configured to bias the first audio amplifier circuit.Type: ApplicationFiled: May 28, 2010Publication date: December 1, 2011Applicant: Fairchild Semiconductor CorporationInventors: Julie Lynn Stultz, Earl Schreyer
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Publication number: 20040183769Abstract: A graphics digitizer having a phase-locked-loop, a timing generator, and at least one channel with a reference and bias voltage generator and an analog-to-digital converter is disclosed. In some embodiments, the phase-locked-loop includes a programmable Div/N circuit so that the output frequency of the signal generated by the phase-locked-loop is programmable. In some embodiments, the timing generator generates a HSOUT video signal in response to the HSYNC video signal by sampling the HSYNC video signal with a phase adaptively chosen in response to a programmable phase between the signal generated by the phase-locked-loop and the HSYNC video signal. In some embodiments of the invention the reference and bias voltage generates a reference voltage determined by a digital-to-analog conversion of a value stored in a programmable gain register and generates a bias voltage proportionally to the reference voltage by a current digital-to-analog conversion of a value stored in a programmable offset register.Type: ApplicationFiled: March 23, 2004Publication date: September 23, 2004Inventors: Earl Schreyer, Ken Martin, David Johns, Raymond Chik, Doug Moran