Patents by Inventor Earl Terence Campbell

Earl Terence Campbell has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11901915
    Abstract: A computer-implemented method for decoding syndromes of a quantum error correction code, the syndromes comprising measurement data from a quantum computer, the method comprising: receiving syndrome measurement data comprising a plurality of quantum error correction rounds performed on a plurality of qubits; identifying a plurality of non-overlapping first blocks within the syndrome measurement data, wherein: each first block has: a first central block of quantum error corrections rounds; and a first buffer block of quantum error correction rounds, wherein the first buffer block surrounds the first central block, and each first block is surrounded by an interstitial region of quantum error correction rounds; identifying the location of a first set of errors in the plurality of qubits by decoding each first block to provide respective decoded first central blocks and respective decoded first buffer blocks; outputting the location of the first set of errors contained within each decoded first central block.
    Type: Grant
    Filed: September 16, 2022
    Date of Patent: February 13, 2024
    Assignee: RIVERLANE LTD.
    Inventors: Earl Terence Campbell, Luka Skoric
  • Patent number: 11900221
    Abstract: A technique for performing lattice surgery without using twists is disclosed. Also, an error correcting code and decoder is provided that allows for error decoding of Pauli measurements performed in association with a lattice surgery operation. This allows for overall run-times of lattice surgery to be reduced. For example, some level of errors are tolerable, because they can be corrected, thus fewer measurement rounds (dm) may be performed for a given round of Pauli measurements. Additionally, a temporal encoding of lattice surgery technique is provided, which may additionally or alternatively be used to shorten run times. Also, a quantum computer layout is provided, wherein the layout includes a core computing region and a cache region. Also, protocols for swapping logical qubits between the core and cache are provided.
    Type: Grant
    Filed: December 8, 2021
    Date of Patent: February 13, 2024
    Assignee: Amazon Technologies, Inc.
    Inventors: Christopher Chamberland, Earl Terence Campbell