Abstract: A method is disclosed for implementing a processing environment for a processor having an on-chip cache such that a functional external memory subsystem is not required. The on-chip cache is initialized upon start-up of the processor, which is coupled to a boot-up read only memory (ROM), such that each line in each way of the on-chip cache is driven to the same known state of the cache consistency protocol implemented by the on-chip cache. The on-chip cache is loaded with dummy data through the use of a ready signal generator, which ends the wait state of the processor allowing the processor to proceed with loading although no valid data exists. Regardless of the validity or contents of the dummy data, the on-chip cache will be driven to the known state without resorting to the external memory subsystem. The on-chip cache may then be used as a memory device for use with client programs contained in the boot-up ROM. Execution of the client programs can proceed without a functional external memory subsystem.