Patents by Inventor Eashwar Thiagarajan

Eashwar Thiagarajan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240406619
    Abstract: A method includes receiving a first signal, wherein the first signal is an audio signal. The method further includes providing the first signal to a first comparison circuit. The method further includes providing the first signal to a second comparison circuit. The method further includes receiving, from the first comparison circuit, a first comparison signal. The method further includes receiving, from the second comparison circuit, a second comparison signal. The method further includes providing a wake-up signal to a processing device based on the first comparison signal and the second comparison signal.
    Type: Application
    Filed: June 5, 2023
    Publication date: December 5, 2024
    Applicant: Cypress Semiconductor Corporation
    Inventors: Eashwar Thiagarajan, Rodolfo Gondim Lossio, Ding Ma, Nidhin Mulangattil Sudhakaran, Andrew Page, Ashutosh Pandey, Bert Sullam
  • Publication number: 20240394452
    Abstract: A method can include storing operation data in entries of memory mapped storage circuits of an integrated circuit (IC) device. The operation data of a single entry can include configuration data, an action value, and channel data having channel bits corresponding to different signal channels. Operation of the analog circuit can be configured with the configuration data. Signal channels to an analog circuit can be configured with channel data. In response to a first action value of the entry, selecting a next entry and the analog circuit and signal channels with configuration data of the next entry. In response to a second action value, ending operations of the analog circuit. Corresponding devices and systems are also disclosed.
    Type: Application
    Filed: May 24, 2023
    Publication date: November 28, 2024
    Applicant: Cypress Semiconductor Corporation
    Inventors: Bert Sullam, Nidhin MULANGATTIL SUDHAKARAN, Andrew PAGE, Eashwar THIAGARAJAN
  • Publication number: 20240385139
    Abstract: One or more computing devices, systems, and/or methods are provided. In an example of the techniques presented herein, a method is provided. The method includes connecting a first programmable electrode interface to one of a first working electrode, a control electrode, a reference electrode, or a guard electrode of an electrochemical cell in a first configuration, and connecting the first programmable electrode interface to a different one of the first working electrode, the control electrode, the reference electrode, or the guard electrode in a second configuration.
    Type: Application
    Filed: May 18, 2023
    Publication date: November 21, 2024
    Applicant: Cypress Semiconductor Corporation
    Inventors: Eashwar Thiagarajan, Ding Ma, Nidhin Mulangattil Sudhakaran, Andrew Page, Bert Sullam
  • Publication number: 20240250684
    Abstract: One or more computing devices, systems, and/or methods are provided. In an example of the techniques presented herein, a system comprises a first input terminal and a first programmable analog block configured according to a first configuration. A controller is configured to reconfigure the first programmable analog block according to a second configuration different than the first configuration based on a first signal received at the first input terminal.
    Type: Application
    Filed: January 19, 2023
    Publication date: July 25, 2024
    Applicant: Cypress Semiconductor Corporation
    Inventors: Nidhin MULANGATTIL SUDHAKARAN, Bert SULLAM, Eashwar THIAGARAJAN
  • Publication number: 20240168514
    Abstract: Implementations disclosed describe a programmable analog subsystem (PASS) having a plurality of reconfigurable analog circuits. The PASS may be coupled to an input/output device to receive an input signal and to an interface to communicate data with a central processing unit. A controller may be configured, based on a plurality of parameters stored at the controller, to configure the plurality of reconfigurable analog circuits into a first PASS state. The PASS may process the first input signal through the plurality of reconfigurable analog circuits in the first PASS state to generate a first output value based on the first input signal. Responsive to a trigger event, the controller may reconfigure the plurality of reconfigurable analog circuits into a second PASS state different from the first PASS state. The PASS may perform a function based on the first output value in the second PASS state.
    Type: Application
    Filed: November 18, 2022
    Publication date: May 23, 2024
    Applicant: Cypress Semiconductor Corporation
    Inventors: Eashwar THIAGARAJAN, Bert SULLAM, Nidhin MULANGATTIL SUDHAKARAN, Andrew PAGE
  • Patent number: 11770109
    Abstract: An integrated circuit can include an amplifier coupled to receive an analog input signal, an anti-aliasing filter (AAF) coupled to an output of the amplifier, a buffer circuit coupled to an output of the AAF, a sigma-delta modulator configured to generate a digital data stream in response to an output of the buffer, and a plurality of chopping circuits nested within one another, including a first pair of chopping circuits having at least the amplifier disposed therebetween and configured to remove offset in the analog input signal, and a second pair of chopping circuit having at least the first pair of chopping circuits disposed therebetween. The amplifier, AAF, sigma-delta modulator, and chopping circuits can be formed with the same integrated circuit substrate. Corresponding methods and systems are also disclosed.
    Type: Grant
    Filed: September 1, 2022
    Date of Patent: September 26, 2023
    Assignee: Cypress Semiconductor Corporation
    Inventors: Erhan Hancioglu, Eashwar Thiagarajan, Eric Mann, Harold Kutz, Vaibhav Ramamoorthy, Rajiv Singh, Amsby Richardson, Jr.
  • Publication number: 20230188139
    Abstract: Implementations disclosed describe an integrated circuit (IC) having a plurality of reconfigurable analog circuits that include a finite state machine (FSM) logic circuit and further include an interface to receive an input signal. In a first IC configuration, with the plurality of reconfigurable analog circuits having a first configuration setting, the IC may process the input signal through the plurality of reconfigurable analog circuits to generate a first output value based on the input signal. Responsive to the FSM logic circuit processing the first output value, the IC may reconfigure the plurality of reconfigurable analog circuits into a second IC configuration having a second configuration setting.
    Type: Application
    Filed: December 16, 2022
    Publication date: June 15, 2023
    Applicant: Cypress Semiconductor Corporation
    Inventors: Eashwar THIAGARAJAN, Andrew PAGE, Harold KUTZ, Kendall CASTOR-PERRY, Rajiv SINGH, Erhan HANCIOGLU, Bert SULLAM
  • Publication number: 20230055860
    Abstract: An integrated circuit can include an amplifier coupled to receive an analog input signal, an anti-aliasing filter (AAF) coupled to an output of the amplifier, a buffer circuit coupled to an output of the AAF, a sigma-delta modulator configured to generate a digital data stream in response to an output of the buffer, and a plurality of chopping circuits nested within one another, including a first pair of chopping circuits having at least the amplifier disposed therebetween and configured to remove offset in the analog input signal, and a second pair of chopping circuit having at least the first pair of chopping circuits disposed therebetween. The amplifier, AAF, sigma-delta modulator, and chopping circuits can be formed with the same integrated circuit substrate. Corresponding methods and systems are also disclosed.
    Type: Application
    Filed: September 1, 2022
    Publication date: February 23, 2023
    Applicant: Cypress Semiconductor Corporation
    Inventors: Erhan Hancioglu, Eashwar Thiagarajan, Eric Mann, Harold Kutz, Vaibhav Ramamoorthy, Rajiv Singh, Amsby Richardson, JR.
  • Patent number: 11533055
    Abstract: Implementations disclosed describe a programmable analog subsystem (PASS) having a plurality of reconfigurable analog circuits. The PASS may be coupled to an input/output device to receive an input signal and to an interface to communicate data with a central processing unit. In a first PASS configuration, with the plurality of reconfigurable analog circuits having a first configuration setting, the PASS may process the input signal through the plurality of reconfigurable analog circuits to generate a first output value based on the input signal. Responsive to the first output value, the PASS may reconfigure the plurality of reconfigurable analog circuits into a second PASS configuration having a second configuration setting, such that the second configuration setting is different than the first configuration setting.
    Type: Grant
    Filed: March 29, 2019
    Date of Patent: December 20, 2022
    Assignee: Cypress Semiconductor Corporation
    Inventors: Eashwar Thiagarajan, Andrew Page, Harold Kutz, Kendall Castor-Perry, Rajiv Singh, Erhan Hancioglu, Bert Sullam
  • Patent number: 11496148
    Abstract: One or more systems and/or methods for implementing an analog-to-digital converter system with a floating digital channel configuration are provided. An analog input component is configured to receive measured analog signals, and output analog signals, corresponding to the measured analog signals, to an analog channel coupled to the analog input component. The analog channel is coupled to a switching component connected to a first digital channel and a second digital channel. The analog channel comprises a modulator configured to convert the analog signals into a data stream selectively input by the switching component to the first digital channel or the second digital channel.
    Type: Grant
    Filed: April 28, 2021
    Date of Patent: November 8, 2022
    Assignee: Cypress Semiconductor Corporation
    Inventors: Eric N. Mann, Erhan Hancioglu, Eashwar Thiagarajan, Harold Kutz, Amsby D Richardson, Jr.
  • Publication number: 20220302925
    Abstract: One or more systems and/or methods for implementing an analog-to-digital converter system with a floating digital channel configuration are provided. An analog input component is configured to receive measured analog signals, and output analog signals, corresponding to the measured analog signals, to an analog channel coupled to the analog input component. The analog channel is coupled to a switching component connected to a first digital channel and a second digital channel. The analog channel comprises a modulator configured to convert the analog signals into a data stream selectively input by the switching component to the first digital channel or the second digital channel.
    Type: Application
    Filed: April 28, 2021
    Publication date: September 22, 2022
    Applicant: Cypress Semiconductor Corporation
    Inventors: Eric N. Mann, Erhan Hancioglu, Eashwar Thiagarajan, Harold Kutz, Amsby D Richardson, JR.
  • Patent number: 11437961
    Abstract: An integrated circuit can include an amplifier coupled to receive an analog input signal, an anti-aliasing filter (AAF) coupled to an output of the amplifier, a buffer circuit coupled to an output of the AAF, a sigma-delta modulator configured to generate a digital data stream in response to an output of the buffer, and a plurality of chopping circuits nested within one another, including a first pair of chopping circuits having at least the amplifier disposed therebetween and configured to remove offset in the analog input signal, and a second pair of chopping circuit having at least the first pair of chopping circuits disposed therebetween. The amplifier, AAF, sigma-delta modulator, and chopping circuits can be formed with the same integrated circuit substrate. Corresponding methods and systems are also disclosed.
    Type: Grant
    Filed: June 26, 2020
    Date of Patent: September 6, 2022
    Assignee: Cypress Semiconductor Corporation
    Inventors: Erhan Hancioglu, Eashwar Thiagarajan, Eric Mann, Harold Kutz, Vaibhav Ramamoorthy, Rajiv Singh, Amsby Richardson, Jr.
  • Patent number: 11251805
    Abstract: A method can include modulating an amplified analog signal into a digital data stream, filtering the digital data stream with a first filter, generating gain control values associated with amplified analog signal based on the filtered data stream with the first filter and filtering the digital data stream with a second filter, and generating output digital values associated with the amplified analog signal based on the filtered data stream with the second filter. Corresponding systems and devices are also disclosed.
    Type: Grant
    Filed: October 16, 2020
    Date of Patent: February 15, 2022
    Assignee: Cypress Semiconductor Corporation
    Inventors: Eashwar Thiagarajan, Erhan Hancioglu, Eric N. Mann, Harold Kutz, Amsby D Richardson, Jr., Rajiv Singh
  • Publication number: 20210408986
    Abstract: An integrated circuit can include an amplifier coupled to receive an analog input signal, an anti-aliasing filter (AAF) coupled to an output of the amplifier, a buffer circuit coupled to an output of the AAF, a sigma-delta modulator configured to generate a digital data stream in response to an output of the buffer, and a plurality of chopping circuits nested within one another, including a first pair of chopping circuits having at least the amplifier disposed therebetween and configured to remove offset in the analog input signal, and a second pair of chopping circuit having at least the first pair of chopping circuits disposed therebetween. The amplifier, AAF, sigma-delta modulator, and chopping circuits can be formed with the same integrated circuit substrate. Corresponding methods and systems are also disclosed.
    Type: Application
    Filed: June 26, 2020
    Publication date: December 30, 2021
    Applicant: Cypress Semiconductor Corporation
    Inventors: Erhan Hancioglu, Eashwar Thiagarajan, Eric Mann, Harold Kutz, Vaibhav Ramamoorthy, Rajiv Singh, Amsby Richardson, JR.
  • Publication number: 20210409034
    Abstract: A method can include modulating an amplified analog signal into a digital data stream, filtering the digital data stream with a first filter, generating gain control values associated with amplified analog signal based on the filtered data stream with the first filter and filtering the digital data stream with a second filter, and generating output digital values associated with the amplified analog signal based on the filtered data stream with the second filter. Corresponding systems and devices are also disclosed.
    Type: Application
    Filed: October 16, 2020
    Publication date: December 30, 2021
    Applicant: Cypress Semiconductor Corporation
    Inventors: Eashwar Thiagarajan, Erhan Hancioglu, Eric N. Mann, Harold Kutz, Amsby D. Richardson, JR., Rajiv Singh
  • Patent number: 11105851
    Abstract: A microcontroller comprises a plurality of digital peripheral blocks and a direct memory access (DMA) controller coupled thereto. The plurality of digital peripheral blocks includes a digital peripheral block that is configured to issue a DMA request. Upon receipt of the DMA request, the DMA controller is configured to retrieve configuration information and to write the configuration information to a configuration register associated with a circuit element of the microcontroller.
    Type: Grant
    Filed: March 17, 2020
    Date of Patent: August 31, 2021
    Assignee: Cypress Semiconductor Corporation
    Inventors: Harold Kutz, Timothy John Williams, Bert Sullam, Warren S. Snyder, James H. Shutt, Bruce E. Byrkett, Monte Mar, Eashwar Thiagarajan, Nathan Wayne Kohagen, David G. Wright, Mark E Hastings, Dennis R. Seguine
  • Patent number: 10848170
    Abstract: A method can include, amplifying an analog input signal to generate an amplified analog signal; modulating the amplified analog signal into a digital data stream; filtering the digital data stream with a first digital filter to generate a first filtered data stream, and selectively changing a gain of the amplifier in response to the first filtered data stream. While the digital data stream is filtered with the first digital filter, the digital data stream is filtered with a second digital filter to generate a second filtered data stream. An output digital value corresponding to the analog input signal in response to the second filtered data stream. Corresponding systems and devices are also disclosed.
    Type: Grant
    Filed: June 26, 2020
    Date of Patent: November 24, 2020
    Assignee: Cypress Semiconductor Corporation
    Inventors: Eashwar Thiagarajan, Erhan Hancioglu, Eric Mann, Harold Kutz, Amsby Richardson, Jr., Rajiv Singh
  • Publication number: 20200300910
    Abstract: A microcontroller comprises a plurality of digital peripheral blocks and a direct memory access (DMA) controller coupled thereto. The plurality of digital peripheral blocks includes a digital peripheral block that is configured to issue a DMA request. Upon receipt of the DMA request, the DMA controller is configured to retrieve configuration information and to write the configuration information to a configuration register associated with a circuit element of the microcontroller.
    Type: Application
    Filed: March 17, 2020
    Publication date: September 24, 2020
    Applicant: Cypress Semiconductor Corporation
    Inventors: Harold Kutz, Timothy John Williams, Bert Sullam, Warren S. Snyder, James H. Shutt, Bruce E. Byrkett, Monte Mar, Eashwar Thiagarajan, Nathan Wayne Kohagen, David G. Wright, Mark E Hastings, Dennis R. Seguine
  • Patent number: 10762019
    Abstract: A programmable device, having an analog component coupled with an analog bus and a digital component coupled with a digital bus together with a set of 10 pads, each of which capable of being coupled to a bus line of one segment of the analog bus as well as to at least one digital bus line, and where the analog bus is capable of being used to connect a pair of the pads to each other.
    Type: Grant
    Filed: July 11, 2017
    Date of Patent: September 1, 2020
    Assignee: Cypress Semiconductor Corporation
    Inventors: Timothy John Williams, David G. Wright, Harold M. Kutz, Eashwar Thiagarajan, Warren S. Snyder, Mark E Hastings
  • Patent number: 10634722
    Abstract: A programmable device comprises a plurality of programmable blocks, a debug interface coupled with the plurality of programmable blocks, a debug interface coupled with the plurality of programmable blocks, and a power manger coupled with the plurality of programmable blocks. The power manager is configured to supply power to a subset of the plurality of programmable blocks during debugging of the subset while maintaining a different subset of the plurality of programmable blocks in a lower power mode.
    Type: Grant
    Filed: May 23, 2019
    Date of Patent: April 28, 2020
    Assignee: Cypress Semiconductor Corporation
    Inventors: Harold Kutz, Timothy John Williams, Bert Sullam, Warren S. Snyder, James H. Shutt, Bruce E. Byrkett, Monte Mar, Eashwar Thiagarajan, Nathan Wayne Kohagen, David G. Wright, Mark E Hastings, Dennis R. Seguine