Abstract: Techniques facilitating frequency allocation in multi-qubit circuits are provided. In one example, a computer-implemented method comprises determining, by a device operatively coupled to a processor, an estimated fabrication yield associated with respective qubit chip configurations by conducting simulations of the respective qubit chip configurations at respective frequency offsets; and selecting, by the device, a qubit chip configuration from among the respective qubit chip configurations based on the estimated fabrication yield associated with the respective qubit chip configurations.

Abstract: Techniques facilitating frequency allocation in multi-qubit circuits are provided. In one example, a computer-implemented method comprises determining, by a device operatively coupled to a processor, an estimated fabrication yield associated with respective qubit chip configurations by conducting simulations of the respective qubit chip configurations at respective frequency offsets; and selecting, by the device, a qubit chip configuration from among the respective qubit chip configurations based on the estimated fabrication yield associated with the respective qubit chip configurations.

Abstract: Systems and techniques that facilitate Stark shift cancellation are provided. In various embodiments, a system can comprise a control qubit that is coupled to a target qubit. In various cases, the control qubit can be driven by a first tone that entangles the control qubit with the target qubit. In various aspects, the control qubit can be further driven by a second tone simultaneously with the first tone. In various cases, the second tone can have an opposite detuning sign than the first tone. In various instances, the first tone can cause a Stark shift in an operational frequency of the control qubit, and the second tone can cancel the Stark shift.

Abstract: Systems, devices, computer-implemented methods, and/or computer program products that facilitate dynamic control of ZZ interactions for quantum computing devices. In one example, a quantum device can comprise a biasing component that is operatively coupled to first and second qubits via respective first and second drive lines. The biasing component can facilitate dynamic control of ZZ interactions between the first and second qubits using continuous wave (CW) tones applied via the respective first and second drive lines.

Abstract: Techniques regarding tiling a CR gate configuration to one or more lattices characterizing quantum circuit topologies are provided. For example, one or more embodiments described herein can comprise a system, which can comprise a memory that can store computer executable components. The system can also comprise a processor, operably coupled to the memory, and that can execute the computer executable components stored in the memory. The computer executable components can comprise a tiling component that can generate a cross-resonance gate configuration that delineates a control qubit assignment and a target qubit assignment in conjunction with a frequency allocation onto a lattice characterizing a quantum circuit topology.

Abstract: Systems, devices, computer-implemented methods, and/or computer program products that facilitate dynamic control of ZZ interactions for quantum computing devices. In one example, a quantum device can comprise a biasing component that is operatively coupled to first and second qubits via respective first and second drive lines. The biasing component can facilitate dynamic control of ZZ interactions between the first and second qubits using continuous wave (CW) tones applied via the respective first and second drive lines.

Abstract: Lattice arrangements for quantum qubits are described. A lattice arrangement can comprise adjacent structures having vertices connected by edges. The qubits can be positioned on the vertices. A qubit in the lattice arrangement directly connects to not more than three other qubits, or connects to another qubit via a coupling qubit on an edge between two qubits on a vertex. The adjacent structures can comprise hexagons, dodecagons or octagons. A superconducting qubit lattice can comprise superconducting target qubits and superconducting control qubits. The superconducting qubit lattice can comprise adjacent structures having vertices connected by edges, with target qubits positioned on the vertices and control qubits positioned on the edges. Logic operations between adjacent superconducting target and control qubits can be implemented by driving the superconducting control qubit at or near the frequency of the superconducting target qubit.

Abstract: Devices and/or computer-implemented methods to facilitate a cross-resonance operation in a dispersive regime of a qubit frequency space are provided. According to an embodiment, a device can comprise a first qubit having a first operating frequency and a first anharmonicity. The device can further comprise a second qubit that couples to the first qubit to perform a cross-resonance operation. The second qubit having a second operating frequency and a second anharmonicity. A detuning between the first operating frequency and the second operating frequency is larger than the first anharmonicity and the second anharmonicity.

Abstract: In a system including a cross-resonance gate having a superconducting control qubit and having a superconducting target qubit coupled through a bus resonator, echo pulses are generated at a first frequency and directed to the control qubit, wherein the first frequency is on resonance with the control qubit. Cross-resonance pulses are generated at a second frequency on resonance with the target qubit and applied to the control qubit, wherein the generating and applying the cross-resonance pulses induce rotations on the target qubit through an interaction that is mediated by the bus resonator. Cancellation pulses are generated at the second frequency and applied to the target qubit. Sets of Hamiltonian tomographies may be measured to determine appropriate amplitudes and phases of the cross-resonance and cancellation pulses.

Abstract: Lattice arrangements for quantum qubits are described. A lattice arrangement can comprise adjacent structures having vertices connected by edges. The qubits can be positioned on the vertices. A qubit in the lattice arrangement directly connects to not more than three other qubits, or connects to another qubit via a coupling qubit on an edge between two qubits on a vertex. The adjacent structures can comprise hexagons, dodecagons or octagons. A superconducting qubit lattice can comprise superconducting target qubits and superconducting control qubits. The superconducting qubit lattice can comprise adjacent structures having vertices connected by edges, with target qubits positioned on the vertices and control qubits positioned on the edges. Logic operations between adjacent superconducting target and control qubits can be implemented by driving the superconducting control qubit at or near the frequency of the superconducting target qubit.

Abstract: Techniques facilitating frequency allocation in multi-qubit circuits are provided. In one example, a computer-implemented method comprises determining, by a device operatively coupled to a processor, an estimated fabrication yield associated with respective qubit chip configurations by conducting simulations of the respective qubit chip configurations at respective frequency offsets; and selecting, by the device, a qubit chip configuration from among the respective qubit chip configurations based on the estimated fabrication yield associated with the respective qubit chip configurations.

Abstract: Techniques facilitating frequency allocation in multi-qubit circuits are provided. In one example, a computer-implemented method comprises determining, by a device operatively coupled to a processor, an estimated fabrication yield associated with respective qubit chip configurations by conducting simulations of the respective qubit chip configurations at respective frequency offsets; and selecting, by the device, a qubit chip configuration from among the respective qubit chip configurations based on the estimated fabrication yield associated with the respective qubit chip configurations.

Abstract: Lattice arrangements for quantum qubits are described. A lattice arrangement can comprise adjacent structures having vertices connected by edges. The qubits can be positioned on the vertices. A qubit in the lattice arrangement directly connects to not more than three other qubits, or connects to another qubit via a coupling qubit on an edge between two qubits on a vertex. The adjacent structures can comprise hexagons, dodecagons or octagons. A superconducting qubit lattice can comprise superconducting target qubits and superconducting control qubits. The superconducting qubit lattice can comprise adjacent structures having vertices connected by edges, with target qubits positioned on the vertices and control qubits positioned on the edges. Logic operations between adjacent superconducting target and control qubits can be implemented by driving the superconducting control qubit at or near the frequency of the superconducting target qubit.

Abstract: Techniques facilitating frequency allocation in multi-qubit circuits are provided. In one example, a computer-implemented method comprises determining, by a device operatively coupled to a processor, an estimated fabrication yield associated with respective qubit chip configurations by conducting simulations of the respective qubit chip configurations at respective frequency offsets; and selecting, by the device, a qubit chip configuration from among the respective qubit chip configurations based on the estimated fabrication yield associated with the respective qubit chip configurations.

Abstract: Lattice arrangements for quantum qubits are described. A lattice arrangement can comprise adjacent structures having vertices connected by edges. The qubits can be positioned on the vertices. A qubit in the lattice arrangement directly connects to not more than three other qubits, or connects to another qubit via a coupling qubit on an edge between two qubits on a vertex. The adjacent structures can comprise hexagons, dodecagons or octagons. A superconducting qubit lattice can comprise superconducting target qubits and superconducting control qubits. The superconducting qubit lattice can comprise adjacent structures having vertices connected by edges, with target qubits positioned on the vertices and control qubits positioned on the edges. Logic operations between adjacent superconducting target and control qubits can be implemented by driving the superconducting control qubit at or near the frequency of the superconducting target qubit.

Abstract: Lattice arrangements for quantum qubits are described. A lattice arrangement can comprise adjacent structures having vertices connected by edges. The qubits can be positioned on the vertices. A qubit in the lattice arrangement directly connects to not more than three other qubits, or connects to another qubit via a coupling qubit on an edge between two qubits on a vertex. The adjacent structures can comprise hexagons, dodecagons or octagons. A superconducting qubit lattice can comprise superconducting target qubits and superconducting control qubits. The superconducting qubit lattice can comprise adjacent structures having vertices connected by edges, with target qubits positioned on the vertices and control qubits positioned on the edges. Logic operations between adjacent superconducting target and control qubits can be implemented by driving the superconducting control qubit at or near the frequency of the superconducting target qubit.

Abstract: Techniques facilitating frequency allocation in multi-qubit circuits are provided. In one example, a computer-implemented method comprises determining, by a device operatively coupled to a processor, an estimated fabrication yield associated with respective qubit chip configurations by conducting simulations of the respective qubit chip configurations at respective frequency offsets; and selecting, by the device, a qubit chip configuration from among the respective qubit chip configurations based on the estimated fabrication yield associated with the respective qubit chip configurations.

Abstract: A technique relates to quantum error correction. Code qubits are configured as target qubits, and the code qubits have a first dephasing time and a first anharmonicity. Syndrome qubits are configured as control qubits, and the syndrome qubits have a second dephasing time and a second anharmonicity. The target qubits and the control qubits are configured to form one or more controlled not (CNOT) gates. The first dephasing time is greater than the second dephasing time and the second anharmonicity is greater than the first anharmonicity.

Abstract: A technique relates to providing a superconducting quantum device. A fixed frequency transmon qubit is provided. A tunable frequency transmon qubit is provided. The fixed frequency transmon qubit is coupled to the tunable frequency transmon qubit to form a single qubit.

Abstract: A technique relates to quantum error correction. Code qubits are configured as target qubits, and the code qubits have a first dephasing time and a first anharmonicity. Syndrome qubits are configured as control qubits, and the syndrome qubits have a second dephasing time and a second anharmonicity. The target qubits and the control qubits are configured to form one or more controlled not (CNOT) gates. The first dephasing time is greater than the second dephasing time and the second anharmonicity is greater than the first anharmonicity.