Abstract: A dynamic metal oxide semiconductor field effect transistor clocking circuit that includes a first circuit which in turn includes a chargeable node, precharge capability, isolation capability and discharge capability to provide an output upon the occurrence of an input. This first circuit is connected to a second circuit which also includes a chargeable node, a precharge capability, isolation capability and the first circuit discharge capability to conditionally provide a total circuit delay output upon an occurrence of an input from the first circuit with a minimum number of clocking signals.

Abstract: A dynamic metal oxide field effect transistor clocking circuit provides at least one output at a fixed time interval after receiving an input. This clocking circuit includes a first stage which further includes a node connected to the first stage output and circuit capability to charge the node and conditionally discharge the node upon receiving an input. A second stage is connected to the first stage so that the output of the first stage provides the second stage input. The second stage also consists of a node that is charged by circuitry in the second stage and is conditionally discharged upon the occurrence of the input received from the first stage. The second stage includes the capability to block the discharge of the second stage when the first stage discharges without the requirement of a second discharge clock.

Abstract: A read-only memory includes several branches of transistors which are connected to address decode circuitry together with transistors to address each of the branches where these addressing transistors are also connected to address decode circuits. Each of the addressed branches are capable of conditionally discharging a precharged node dependent upon the stored data in the transistor branches.