Patents by Inventor Eberhard B. Gramatzki

Eberhard B. Gramatzki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7119003
    Abstract: A method and structure for coupling a semiconductor substrate (e.g., a semiconductor chip) to an organic substrate (e.g., a chip carrier). The coupling interfaces a solder member (e.g., a solder ball) to both a conductive pad on the semiconductor substrate and a conductive pad on the organic substrate. Thermal strains on the solder member during thermal cycling may be reduced by having a surface area of the pad on the semiconductor substrate exceed a surface area of the pad on the organic substrate. Thermal strains on the solder member during thermal cycling may also be reduced by having a distance from a centerline of the solder member to a closest lateral edge of the semiconductor substrate exceed about 0.25 mm.
    Type: Grant
    Filed: June 8, 2005
    Date of Patent: October 10, 2006
    Assignee: International Business Machines Corporation
    Inventors: William E. Bernier, Charles F. Carey, Eberhard B. Gramatzki, Thomas R. Homa, Eric A. Johnson, Pierre Langevin, Irving Memis, Son K. Tran, Robert F. White
  • Patent number: 7067916
    Abstract: A method and structure for coupling a semiconductor substrate (e.g., a semiconductor chip) to an organic substrate (e.g., a chip carrier). The coupling interfaces a solder member (e.g., a solder ball) to both a conductive pad on the semiconductor substrate and a conductive pad on the organic substrate. Thermal strains on the solder member during thermal cycling may be reduced by having a surface area of the pad on the semiconductor substrate exceed a surface area of the pad on the organic substrate. Thermal strains on the solder member during thermal cycling may also be reduced by having a distance from a centerline of the solder member to a closest lateral edge of the semiconductor substrate exceed about 0.25 mm.
    Type: Grant
    Filed: June 20, 2001
    Date of Patent: June 27, 2006
    Assignee: International Business Machines Corporation
    Inventors: William E. Bernier, Charles F. Carey, Eberhard B. Gramatzki, Thomas R. Homa, Eric A. Johnson, Pierre Langevin, Irving Memis, Son K. Tran, Robert F. White
  • Publication number: 20020195707
    Abstract: A method and structure for coupling a semiconductor substrate (e.g., a semiconductor chip) to an organic substrate (e.g., a chip carrier). The coupling interfaces a solder member (e.g., a solder ball) to both a conductive pad on the semiconductor substrate and a conductive pad on the organic substrate. Thermal strains on the solder member during thermal cycling may be reduced by having a surface area of the pad on the semiconductor substrate exceed a surface area of the pad on the organic substrate. Thermal strains on the solder member during thermal cycling may also be reduced by having a distance from a centerline of the solder member to a closest lateral edge of the semiconductor substrate exceed about 0.25 mm.
    Type: Application
    Filed: June 20, 2001
    Publication date: December 26, 2002
    Applicant: International Business machines Corporation
    Inventors: William E. Bernier, Charles F. Carey, Eberhard B. Gramatzki, Thomas R. Homa, Eric A. Johnson, Pierre Langevin, Irving Memis, Son K. Tran, Robert F. White