Abstract: One embodiment is a microelectronic assembly including an assembly support structure; a first die including a pair of hot via comprising through-substrate-via (TSVs) extending through the first die between first and second sides thereof and a plurality of ground vias surrounding the pair of hot vias and extending through the first die between the first and second sides thereof. The first die further includes a pair of signal interconnect structures electrically connected to the pair of hot vias disposed on the second side of the first die. The assembly further includes a second die between the assembly support structure and the first die the pair of signal interconnect structures disposed on the first side thereof. The first die is connected to the second die via a signal die-to-die (DTD) interconnect structure including the signal interconnect structures of the first and second dies.

Abstract: One embodiment is a reconfigurable mixer topology for selectively implementing one of a harmonic rejection mixer (HRM) and a subharmonic mixer (SHM), the reconfigurable mixer topology comprising a mixer core comprising a plurality of differential mixers each having a first clock input and a second clock input; a clock generator for generating a plurality of clock signals each having a different phase; and a clock distributor for distributing the plurality of clock signals to the first and second clock inputs of the differential mixers in accordance with a designated operation of the reconfigurable mixer as an HRM or an SHM.

Abstract: One embodiment is a microelectronic assembly including an assembly support structure; a first die including a pair of hot via comprising through-substrate-via (TSVs) extending through the first die between first and second sides thereof and a plurality of ground vias surrounding the pair of hot vias and extending through the first die between the first and second sides thereof. The first die further includes a pair of signal interconnect structures electrically connected to the pair of hot vias disposed on the second side of the first die. The assembly further includes a second die between the assembly support structure and the first die the pair of signal interconnect structures disposed on the first side thereof. The first die is connected to the second die via a signal die-to-die (DTD) interconnect structure including the signal interconnect structures of the first and second dies.

Abstract: One embodiment is a lower power technique to compensate for radio frequency (RF) amplifier gain and phase over temperature and part-to-part variation for particular use in phased array (PA) applications.

Abstract: One embodiment is a reconfigurable mixer topology for selectively implementing one of a harmonic rejection mixer (HRM) and a subharmonic mixer (SHM), the reconfigurable mixer topology comprising a mixer core comprising a plurality of differential mixers each having a first clock input and a second clock input; a clock generator for generating a plurality of clock signals each having a different phase; and a clock distributor for distributing the plurality of clock signals to the first and second clock inputs of the differential mixers in accordance with a designated operation of the reconfigurable mixer as an HRM or an SHM.

Abstract: One embodiment is an apparatus comprising a silicon-on-insulator (“SOI”) substrate comprising an insulating layer sandwiched in between a bottom silicon layer and a top silicon layer; a radiating element disposed on a top surface of the SOI substrate; and at least one cavity disposed in the SOI substrate surrounding the radiating element, wherein the at least one cavity extends from a bottom surface of the bottom silicon layer to a bottom surface of the insulating layer.

Abstract: An ultra-wideband distributed ADC can be cascaded to build high performance radio frequency (RF) analog electronics integrated with advanced digital complementary metal-oxide-semiconductor (CMOS) electronics on the same wafer. Advantages can include wide spectral coverage, high resolution, large dynamic range, and high information processing bandwidth. Part of an overall system includes a precise, programmable, real-time delay circuit that can achieve picosecond accuracy.

Abstract: One embodiment is an apparatus comprising a silicon-on-insulator (“SOI”) substrate comprising an insulating layer sandwiched in between a bottom silicon layer and a top silicon layer; a radiating element disposed on a top surface of the SOI substrate; and at least one cavity disposed in the SOI substrate surrounding the radiating element, wherein the at least one cavity extends from a bottom surface of the bottom silicon layer to a bottom surface of the insulating layer.

Abstract: An ultra-wideband distributed ADC can be cascaded to build high performance radio frequency (RF) analog electronics integrated with advanced digital complementary metal-oxide-semiconductor (CMOS) electronics on the same wafer. Advantages can include wide spectral coverage, high resolution, large dynamic range, and high information processing bandwidth. Part of an overall system includes a precise, programmable, real-time delay circuit that can achieve picosecond accuracy.

Abstract: A mixer includes an input stage to convert an RF input signal to an output signal, and a mixer core to mix the output signal from the input stage with a local oscillator signal. The input stage may include an input cell having a first differential pair of cross-connected transistors, and a linearizer coupled to the input cell. The linearizer may include a second differential pair of transistors having first and second inputs coupled to the input terminals and first and second outputs coupled to the output terminals.