Patents by Inventor Ed Morson

Ed Morson has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5517518
    Abstract: The present invention is for fast, reliable recognition of coded signals where the signal includes a predetermined code sequence in a lead portion thereof. This has particular application in spread spectrum transmission and receptions. The code sequence is a long sequence of bits known to the receiver which breaks the long sequence into a series of bit segments which are more easily analysed. Each series of bits is analysed for a direct match and a decision whether a code segment has been received is based on the number of direct matches. For example, if there are 8 bit segments, each 16 bits in length, high reliability has been achieved if two direct matches are received within a time period corresponding t the transmission time of the code sequence. This system can also be used for assessing signal strength where many matches indicate good signal strength, approximately 50% indicates moderate signal strength, and less indicating poor signal strength.
    Type: Grant
    Filed: October 4, 1994
    Date of Patent: May 14, 1996
    Assignee: Digital Security Controls Ltd.
    Inventors: Ed Morson, James Parker
  • Patent number: 5345564
    Abstract: A peripheral integrated electronic circuit of the type having an interface for serially transferring data between it and a central processing unit ("CPU") in a computer system that employs a number of such peripheral circuits that are selectively rendered operable by the CPU, one at a time. The peripherals each include an interface that receives an initial data word from the CPU that identifies the peripheral circuit with which data is to be transferred by the CPU. Rather than all such peripherals in a computer system being powered-up in order to have their processors determine individually under software control whether they have been identified by the CPU, only a small hardwired interface circuit is so enabled. Once this interface circuit determines that the CPU desires to conduct data transfer with it, the main portion of the circuit, including its processor, is then powered-up.
    Type: Grant
    Filed: March 31, 1992
    Date of Patent: September 6, 1994
    Assignee: Zilog, Inc.
    Inventors: Bradley D. Jensen, Ed Morson