Patents by Inventor Eddie Breashears

Eddie Breashears has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20050227439
    Abstract: The present invention provides a tri-gate lower power device and method for fabricating that tri-gate semiconductor device. The tri-gate device includes a first gate [455] located over a high voltage gate dielectric [465] within a high voltage region [460], a second gate [435] located over a low voltage gate dielectric [445] within a low voltage core region [440] and a third gate [475] located over an intermediate core oxide [485] within an intermediate core region [480]. One method of fabrication includes forming a high voltage gate dielectric layer [465] over a semiconductor substrate [415], implanting a low dose of nitrogen [415a] into the semiconductor substrate [415] in a low voltage core region [440], and forming a core gate dielectric layer [445] over the low voltage core region [440], including forming an intermediate core gate dielectric layer [485] over an intermediate core region [480].
    Type: Application
    Filed: June 2, 2005
    Publication date: October 13, 2005
    Inventors: Lahir Adam, Eddie Breashears, Alwin Tsao
  • Publication number: 20050215022
    Abstract: The present invention provides a tri-gate lower power device and method for fabricating that tri-gate semiconductor device. The tri-gate device includes a first gate [455] located over a high voltage gate dielectric [465] within a high voltage region [460], a second gate [435] located over a low voltage gate dielectric [445] within a low voltage core region [440] and a third gate [475] located over an intermediate core oxide [485] within an intermediate core region [480]. One method of fabrication includes forming a high voltage gate dielectric layer [465] over a semiconductor substrate [415], implanting a low dose of nitrogen [415a] into the semiconductor substrate [415] in a low voltage core region [440], and forming a core gate dielectric layer [445] over the low voltage core region [440], including forming an intermediate core gate dielectric layer [485] over an intermediate core region [480].
    Type: Application
    Filed: March 26, 2004
    Publication date: September 29, 2005
    Applicant: Texas Instruments Incorporated
    Inventors: Lahir Adam, Eddie Breashears, Alwin Tsao
  • Publication number: 20050156286
    Abstract: The present invention provides a method for improving a physical property of a substrate, a method for manufacturing an integrated circuit, and an integrated circuit manufactured using the aforementioned method. In one aspect of the invention, the method for improving a physical property of a substrate includes subjecting the substrate to effects of a plasma process 830, wherein the substrate has a physical property defect value associated therewith subsequent to the plasma process. The method further includes exposing the substrate to an ultraviolet (UV) energy source 840 to improve the physical property defect value.
    Type: Application
    Filed: January 18, 2005
    Publication date: July 21, 2005
    Inventors: Brian Kirkpatrick, Mercer Brugler, Eddie Breashears, Jon Holt, Corbett Zabierek, Rajesh Khamankar
  • Patent number: 6869862
    Abstract: The present invention provides a method for improving a physical property of a substrate, a method for manufacturing an integrated circuit, and an integrated circuit manufactured using the aforementioned method. In one aspect of the invention, the method for improving a physical property of a substrate includes subjecting the substrate to effects of a plasma process 830, wherein the substrate has a physical property defect value associated therewith subsequent to the plasma process. The method further includes exposing the substrate to an ultraviolet (UV) energy source 840 to improve the physical property defect value.
    Type: Grant
    Filed: August 8, 2003
    Date of Patent: March 22, 2005
    Assignee: Texas Instruments Incorporated
    Inventors: Brian K. Kirkpatrick, Mercer Brugler, Eddie Breashears, Jon Holt, Corbett Zabierek, Rajesh Khamankar
  • Publication number: 20040029391
    Abstract: The present invention provides a method for improving a physical property of a substrate, a method for manufacturing an integrated circuit, and an integrated circuit manufactured using the aforementioned method. In one aspect of the invention, the method for improving a physical property of a substrate includes subjecting the substrate to effects of a plasma process 830, wherein the substrate has a physical property defect value associated therewith subsequent to the plasma process. The method further includes exposing the substrate to an ultraviolet (UV) energy source 840 to improve the physical property defect value.
    Type: Application
    Filed: August 8, 2003
    Publication date: February 12, 2004
    Applicant: Texas Instruments Incorporated
    Inventors: Brian K. Kirkpatrick, Mercer Brugler, Eddie Breashears, Jon Holt, Corbett Zabierek, Rajesh Khamankar