Patents by Inventor Eddie K. Chan

Eddie K. Chan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Preventing fast read before write in static random access memory arrays
    Patent number: 8375172
    Abstract: A mechanism is provided for enabling a proper write through during a write-through operation. Responsive to determining the memory access as a write-through operation, first circuitry determines whether a data input signal is in a first state or a second state. Responsive to the data input signal being in the second state, the first circuitry outputs a global write line signal in the first state. Responsive to the global write line signal being in the first state, second circuitry outputs a column select signal in the second state. Responsive to the column select signal being in the second state, third circuitry keeps a downstream read path of the cache access memory at the first state such that data output by the cache memory array is in the first state.
    Type: Grant
    Filed: April 16, 2010
    Date of Patent: February 12, 2013
    Assignee: International Business Machines Corporation
    Inventors: Eddie K. Chan, Michael J. Lee, Ricardo H. Nigaglioni, Bao G. Truong
  • Preventing Fast Read Before Write in Static Random Access Memory Arrays
    Publication number: 20110258395
    Abstract: A mechanism is provided for enabling a proper write through during a write-through operation. Responsive to determining the memory access as a write-through operation, first circuitry determines whether a data input signal is in a first state or a second state. Responsive to the data input signal being in the second state, the first circuitry outputs a global write line signal in the first state. Responsive to the global write line signal being in the first state, second circuitry outputs a column select signal in the second state. Responsive to the column select signal being in the second state, third circuitry keeps a downstream read path of the cache access memory at the first state such that data output by the cache memory array is in the first state.
    Type: Application
    Filed: April 16, 2010
    Publication date: October 20, 2011
    Applicant: International Business Machines Corporation
    Inventors: Eddie K. Chan, Michael J. Lee, Ricardo H. Nigaglioni, Bao G. Truong