Patents by Inventor Eddy Mou

Eddy Mou has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6818475
    Abstract: The present invention provides a method for forming wafer level package. The wafer level package comprising: a plurality of dies formed on the wafer; an I/O metal pad formed on the first surface of the wafer; and coating a photo sensitive polymer, on the first surface of the wafer, then a portion of the film is removed by laser. In the next step, coating a first photoresist on the second surface of the wafer. Forming a first conductive layer in the opening of the photo sensitive polyimide and then covering a I/O metal pad. Next, forming a seeding layer with copper on the top of the first conductive layer and on the photo sensitive polymer; and forming a second photoresist on the seeding layer to define the circuit pattern diagram. Then, forming a second conductive layer to the circuit pattern diagram located on the defined area of the second photoresist.
    Type: Grant
    Filed: August 13, 2003
    Date of Patent: November 16, 2004
    Inventors: Wen-Kun Yang, Eddy Mou
  • Publication number: 20040032026
    Abstract: The present invention comprises a plurality of dies formed on the wafer and an I/O metal pad formed on the first surface of the wafer. Then, photo PI is coated on the first surface, then a portion of the PI is removed by laser. Next step, a first photoresist is coated on the second surface of the wafer and the photoresist includes positive photoresist. A first conductive layer is formed in the hole of the photo PI and covers a metal pad. Subsequently, a seeding layer with copper is formed on the top of the first conductive layer and the photo sensitive polymer layer. Then, a second photoresist is formed on the seeding layer to define the circuit pattern diagram. Then, a second cnductive layer is formed. Next step is to remove the second and the first photoresist covered by the second photoresist, thereby forming trenches therein. Then, the filling material is filled into the trench and covers the circuit pattern diagram.
    Type: Application
    Filed: August 13, 2003
    Publication date: February 19, 2004
    Inventors: Wen-Kun Yang, Eddy Mou
  • Publication number: 20020160597
    Abstract: The present invention comprises a plurality of dies formed on the wafer and an I/O metal pad formed on the first surface of the wafer. Then, photo PI is coated on the first surface, then a portion of the PI is removed by laser. Next step, a first photoresist is coated on the second surface of the wafer and the photoresist includes positive photoresist. A first conductive layer is formed in the hole of the photo PI and covers a metal pad. Subsequently, a seeding layer with copper is formed on the top of the first conductive layer and the photo sensitive polymer layer. Then, a second photoresist is formed on the seeding layer to define the circuit pattern diagram. Then, a second conductive layer is formed. Next step is to remove the second and the first photoresist covered by the second photoresist, thereby forming trenches therein. Then, the filling material is filled into the trench and covers the circuit pattern diagram.
    Type: Application
    Filed: October 22, 2001
    Publication date: October 31, 2002
    Inventors: Wen-Kun Yang, Eddy Mou