Patents by Inventor Eddy Simoen

Eddy Simoen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9431519
    Abstract: A method of producing a III-V fin structure within a gap separating shallow trench isolation (STI) structures and exposing a semiconductor substrate is disclosed, the method comprising providing a semiconductor substrate, providing in the semiconductor substrate at least two identical STI structures separated by a gap exposing the semiconductor substrate, wherein said gap is bounded by said at least two identical STI structures, and, producing a III-V fin structure within said gap on the exposed semiconductor substrate, and providing a diffusion barrier at least in contact with each side wall of said at least two identical STI structures and with side walls of said III-V fin structure and wherein said semiconductor substrate is a Si substrate.
    Type: Grant
    Filed: May 22, 2015
    Date of Patent: August 30, 2016
    Assignees: IMEC VZW, Sony Corporation
    Inventors: Hideki Minari, Shinichi Yoshida, Geoffrey Pourtois, Matty Caymax, Eddy Simoen
  • Publication number: 20150340503
    Abstract: A method of producing a III-V fin structure within a gap separating shallow trench isolation (STI) structures and exposing a semiconductor substrate is disclosed, the method comprising providing a semiconductor substrate, providing in the semiconductor substrate at least two identical STI structures separated by a gap exposing the semiconductor substrate, wherein said gap is bounded by said at least two identical STI structures, and, producing a III-V fin structure within said gap on the exposed semiconductor substrate, and providing a diffusion barrier at least in contact with each side wall of said at least two identical STI structures and with side walls of said III-V fin structure and wherein said semiconductor substrate is a Si substrate.
    Type: Application
    Filed: May 22, 2015
    Publication date: November 26, 2015
    Applicants: SONY CORPORATION, IMEC VZW
    Inventors: Hideki Minari, Shinichi Yoshida, Geoffrey Pourtois, Matty Caymax, Eddy Simoen
  • Patent number: 8227299
    Abstract: A method for removing impurities from at least one semiconductor device layer during manufacturing of a semiconductor device is disclosed. The semiconductor device layer has a compound semiconductor material and/or germanium. Each heating process performed during the manufacturing of the semiconductor device after provision of the semiconductor device layer has a low thermal budget determined by temperatures equal to or lower than about 900° C. and time periods equal to or lower than about 5 minutes. In one aspect, the method includes providing a germanium gettering layer with a higher solubility for the impurities than the semiconductor device layer. The germanium gettering layer is provided at least partly in direct or indirect contact with the at least one semiconductor device layer, such that impurities can diffuse from the at least one semiconductor device layer to the germanium gettering layer.
    Type: Grant
    Filed: May 1, 2009
    Date of Patent: July 24, 2012
    Assignees: IMEC, Umicore
    Inventors: Eddy Simoen, Jan Vanhellemont
  • Publication number: 20090273010
    Abstract: A method for removing impurities from at least one semiconductor device layer during manufacturing of a semiconductor device is disclosed. The semiconductor device layer has a compound semiconductor material and/or germanium. Each heating process performed during the manufacturing of the semiconductor device after provision of the semiconductor device layer has a low thermal budget determined by temperatures equal to or lower than about 900° C. and time periods equal to or lower than about 5 minutes. In one aspect, the method includes providing a germanium gettering layer with a higher solubility for the impurities than the semiconductor device layer. The germanium gettering layer is provided at least partly in direct or indirect contact with the at least one semiconductor device layer, such that impurities can diffuse from the at least one semiconductor device layer to the germanium gettering layer.
    Type: Application
    Filed: May 1, 2009
    Publication date: November 5, 2009
    Applicants: Interuniversitair Microelektronica Centrum vzw (IMEC), Umicore
    Inventors: Eddy Simoen, Jan Vanhellemont