Patents by Inventor Edgar Cilio

Edgar Cilio has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Method and apparatus to non-intrusively measure the weight of loose bulk material within a rigid containing structure
    Patent number: 11566936
    Abstract: A method and system can measure the weight of a bulk material within a container by applying excitation in the form of vibrational energy and interpreting the container's response to the vibration.
    Type: Grant
    Filed: July 20, 2020
    Date of Patent: January 31, 2023
    Assignee: Munters Corporation
    Inventors: Bryon Western, Edgar Cilio
  • Multi-module, scalable, high power density, radiation-hardened power converter interface system
    Patent number: 9419448
    Abstract: The novel cell balancing approach being disclosed minimizes the number of controlled active devices to enable Li-ion cell balancing in a battery arrangement. This is accomplished through a network of passive components associated with each cell. The network of passive components forms a bandpass filter. This allows selective charging of a cell purely based on the frequency components of a variable switching frequency controller.
    Type: Grant
    Filed: June 18, 2014
    Date of Patent: August 16, 2016
    Assignee: Cree Fayetteville, Inc.
    Inventors: Edgar Cilio, Washington Cilio
  • Coupled inductor output filter
    Patent number: 8427120
    Abstract: The present invention is directed to a coupled inductor output filter to be used with DC/DC switched mode power supply topologies. This new output filter changes the inherent power sharing capability of most DC/DC converter topologies, enabling the overall converter to operate as a truly modular block with no inter-module communication required to accomplish power/current sharing on a multi-module configuration. The coupled-inductor output filter uses a split inductor, Lout1 and Lout2, a main output capacitor, Cout, and a DC blocking capacitor, CDC Block.
    Type: Grant
    Filed: May 5, 2011
    Date of Patent: April 23, 2013
    Assignee: Arkansas Power Electronics International, Inc.
    Inventor: Edgar Cilio
  • Normally-off D-mode driven direct drive cascode
    Patent number: 8228114
    Abstract: A direct drive cascode using a gate signal driven D-mode JFET connected in series with a power-enable-signal driven E-Mode JFET to provide a quick-operation high-temperature normally-off cascode configuration with low noise characteristics. The E-mode JFET may have the E-mode gate connected to ground with a pull down power element or resistor.
    Type: Grant
    Filed: September 30, 2010
    Date of Patent: July 24, 2012
    Assignee: Arkansas Power Electronics International, Inc.
    Inventor: Edgar Cilio
  • Low-loss noise-resistant high-temperature gate driver circuits
    Patent number: 7965522
    Abstract: High temperature gate driving circuits with improved noise resistance and minimized loss are implemented with high temperature components with a reduced size magnetic isolation transformer. Input broad-pulse width modulated signals are converted to offsetting narrow pulses to cross the reduced size magnetic transformer minimizing isolation losses. One embodiment teaches time and voltage offset narrow single pulses that control a set and reset regeneration of the pulse width output on the secondary side of the transformer. Another embodiment teaches multiple concurrent voltage offset pulses to cross the transformer and charge a threshold capacitor for both filtering noise and controlling the pulse width regeneration on the secondary side of the transformer.
    Type: Grant
    Filed: September 25, 2009
    Date of Patent: June 21, 2011
    Assignee: Arkansas Power Electronics International, Inc.
    Inventors: Jared Hornberger, Brad Reese, Edgar Cilio, Roberto Marcelo Schupbach, Alex Lostetter, Sharmila Mounce