Abstract: A semiconductor device has a leadframe and a first electrical component disposed over the leadframe. A clip bond is disposed over the first electrical component. The clip bond has a plurality of recesses each having a different depth. A first recess is proximate to a first distal end of the first electrical component, and a second recess is proximate to a second distal end of the first electrical component opposite the first distal end of the first electrical component. A depth of the first recess is different from a depth of the second recess. A third recess is over a surface of the first electrical component. A depth of the third recess is different from the depth of the first recess and the depth of the second recess. A second electrical component is disposed over the leadframe. The clip bond extends over the second electrical component.

Abstract: A semiconductor device having copper interconnecting metallization (111) protected by a first (102) and a second (120) overcoat layer (homogeneous silicon dioxide), portions of the metallization exposed in a window (103) opened through the thicknesses of the first and second overcoat layers. A patterned conductive barrier layer (130) is positioned on the exposed portion of the copper metallization and on portions of the second overcoat layer surrounding the window. A bondable metal layer (150) is positioned on the barrier layer; the thickness of this bondable layer is suitable for wire bonding. A third overcoat layer (160) consist of a homogeneous silicon nitride compound is positioned on the second overcoat layer so that the ledge (162, more than 500 nm high) of the third overcoat layer overlays the edge (150b) of the bondable metal layer. The resulting contoured chip surface improves the adhesion to plastic device encapsulation.

Abstract: A metal structure for an integrated circuit, which has copper interconnecting metallization (311) protected by an overcoat layer (320). A portion of the metallization is exposed in a window (301) opened through the thickness of the overcoat layer. The metal structure comprises a patterned conductive barrier layer (330) positioned on the copper metallization, wherein this barrier layer forms a trough with walls (331) conformal with the overcoat window. The height (331a) of the wall is less (between 3 and 20 %) than the overcoat thickness (320a), forming a step (340). A plug (350) of bondable metal, preferably aluminum, is positioned in the trough and has a thickness equal to the trough wall height (331a).

Abstract: An integrated circuit having copper interconnecting metallization (311, 312) protected by a first, inorganic overcoat layer (320), portions of the metallization exposed in windows (301, 302) opened through the thickness of the first overcoat layer. A patterned conductive barrier layer (330) is positioned on the exposed portion of the copper metallization and on portions of the first overcoat layer surrounding the window. A bondable metal layer (350, 351) is positioned on the barrier layer; the thickness of this bondable layer is suitable for wire bonding. A second, organic overcoat layer (360) is surrounding the window so that the surface (360a) of this second overcoat layer at the edge of the window is at or above the surface (350a) of the bondable layer. The second overcoat layer may be spaced (370) from the edge of the bondable metal layer.

Abstract: A recessed-bond semiconductor package substrate including a plurality of dielectric layers and a plurality of metal layers, wherein the metal layers further include a first metal layer and at least one underlying metal layer, and wherein the underlying metal layer is configured for a direct interconnection with a semiconductor die. Preferably, the top metal layer includes a ground plane. An underlying metal layer comprises the signal layer, which is preferably bonded to the die by a plurality of bond wires.

Abstract: A method (30) of fabricating a micromechanical device (10) by performing spacer layer undercutting (46) and passivation at the package level. A back-end assembly process utilizes a full-cut saw process to separate the partially fabricated micromechanical devices. The individual die are then attached by pick and place equipment to a lead frame and are wire bonded, before the die are undercut. This technique avoids the generation of any particles from becoming lodged under movable structure during the cut process, and further, reduces the susceptibility of the die to damage or particles generated during the pick and place process.

Abstract: An inexpensively fabricated area array semiconductor device substrate having patterned metal interconnections on one surface of a flexible tape is slit in non-patterned regions of each quadrant, and folded so that chip contact pads are located on the top of the substrate, the leads wrap around the edges, and external solder ball contact pads are on the opposite surface of the substrate, thereby eliminating the need for conductive vias. A chip is connected to the substrate either by conventional wire bonding, or by flip chip interconnection. In different embodiments, heat spreaders or other rigid core materials are incorporated, as well as various configurations of stress absorbing layers which assure reliable device assembly.

Abstract: A heat dissipating flip-chip Ball Grid Array (BGA) (10) including a substrate (12), a die (14), a first set of solder balls (16) coupling the die with the substrate, a thermal compound (20) attached to a backside of the die, a second set of solder balls (28) attached to the substrate, and a printed circuit board (22) that includes a heat dissipating metal (24). The heat dissipating metal is in contact with the thermal compound, and the second set of solder balls is connected to thermal vias in the printed circuit board.

Abstract: The present invention discloses a heat dissipating flip-chip Ball Grid Array (BGA) (10). In one embodiment, the flip-chip BGA comprises a substrate (12), a die (14), a first set of solder balls (16) adapted to couple the die with the substrate, a thermal compound (20) adapted to couple to a backside of the die, a second set of solder balls (28) adapted to couple with the substrate, and a printed circuit board (22) comprising a heat dissipating metal (24), wherein the heat dissipating metal is adapted to couple with the thermal compound, and wherein the second set of solder balls is adapted to couple with the printed circuit board.

Abstract: A method of bonding wire between at least one pair of bond locations in a semiconductor device and the bonder. A conveyor is provided having a conveying surface for conveying in a predetermined direction a partially fabricated semiconductor device having first and second bonding locations. A first capillary is provided for forming a stitch bond to the first bonding location, the first capillary being disposed at an angle of about 45 degrees with respect to the predetermined direction and a line normal thereto and substantially parallel to the plane of the conveying surface. A stitch bond is formed on the first bonding location with the first capillary. The first capillary is at an angle of substantially 45 degrees with respect to a line normal to the plane of the conveying surface.

Abstract: A method of bonding wire and the bonder which includes providing a wire bonder for bonding wire to a bonding location. The wire bonder has a first bonding head designed to form a stitch bond while travelling in a first predetermined direction, the first bonding head having a first major axis and a first minor axis normal to the first major axis, the first major axis being at an angle of from about 45 degrees to a finite angle greater than zero relative to the first predetermined direction and a second bonding head designed to form a stitch bond while travelling in a second predetermined direction, the second bonding head having a second major axis and a second minor axis normal to the second major axis, the second major axis being at an angle of from about 45 degrees to a finite angle greater than zero relative to the second predetermined direction. An area having bonding locations to which the bonder is to make wire bonds is divided into a plurality of regions.

Abstract: A method of bonding wire between at least one pair of bond locations in a semiconductor device and the bonder. A conveyor is provided having a conveying surface for conveying in a predetermined direction a partially fabricated semiconductor device having first and second bonding locations. A first capillary is provided for forming a stitch bond to the first bonding location, the first capillary being disposed at an angle of about 45 degrees with respect to the predetermined direction and a line normal thereto and substantially parallel to the plane of the conveying surface. A stitch bond is formed on the first bonding location with the first capillary. The first capillary is at an angle of substantially 45 degrees with respect to a line normal to the plane of the conveying surface.

Abstract: A method of bonding wire and the bonder which includes providing a wire bonder for bonding wire to a bonding location. The wire bonder has a first bonding head designed to form a stitch bond while travelling in a first predetermined direction, the first bonding head having a first major axis and a first minor axis normal to the first major axis, the first major axis being at an angle of from about 45 degrees to a finite angle greater than zero relative to the first predetermined direction and a second bonding head designed to form a stitch bond while travelling in a second predetermined direction, the second bonding head having a second major axis and a second minor axis normal to the second major axis, the second major axis being at an angle of from about 45 degrees to a finite angle greater than zero relative to the second predetermined direction. An area having bonding locations to which the bonder is to make wire bonds is divided into a plurality of regions.

Abstract: An apparatus (304) and method is provided for bonding wire (104) to bond sites (108) of integrated circuits (110), lead frames, and packages at room temperatures. In preferred embodiments a ball end (106) of a gold wire (104) is bonded to an aluminum bond pad (108). Apparatus (304) includes a high frequency ultrasonic energy source (306) designed to provide ultrasonic energy at frequencies above 200 kHz. The ultrasonic energy is transmitted to the bonding interface via capillary (302). In this manner, a strong bond is formed between ball end (106) and bonding site (108). The apparatus and method provided enable bonds of sufficient shear strength to be fabricated in a sufficiently short bonding time even at ambient temperatures, enabling the efficient fabrication of temperature sensitive devices such as micromechanical structures.

Abstract: A method of bonding a wire between a semiconductor die pad and a lead finger of a lead frame which includes providing a capillary having a bore and a wire pigtail extending through the bore and externally of the capillary. A ball is formed with the pigtail, a semiconductor die pad is provided and a ball bond is formed on the die pad with the ball. A lead frame finger is provided and the capillary and the wire threaded through the bore are moved to the lead frame finger. A stitch bond is formed on the lead finger with the capillary. The capillary is moved from the stitch bond with a pigtail of the wire extending out of the bore of the capillary. A second ball is formed with the pigtail and the capillary is again moved toward the stitch bond until the second ball contacts the stitch bond. A ball bond is then formed over and secured to the stitch bond and to the lead frame finger.