Patents by Inventor Edgardo Rulloda Hortaleza

Edgardo Rulloda Hortaleza has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20120199960
    Abstract: An integrated circuit (IC) device includes an interposer having a dielectric substrate having a first side, a second side, and an inner aperture, wherein a plurality of electrically conductive traces are on the first side. An IC die includes a topside semiconductor surface having active circuitry and a bottomside surface, wherein the topside semiconductor surface includes a plurality of bond pads, and is attached over the inner aperture onto the interposer. First wirebond interconnects couple respective bond pads to respective electrically conductive traces. A workpiece includes a top workpiece surface including a plurality of contact pads thereon attached to the first side of the interposer. Second interconnects couple respective conductive traces to respective contact pads on the workpiece.
    Type: Application
    Filed: February 7, 2011
    Publication date: August 9, 2012
    Applicant: TEXAS INSTRUMENTS INCORPORATED
    Inventors: GLENN ENRICK CALDERON COSUE, EDGARDO RULLODA HORTALEZA, GERARDO CALDERON ANGELES, TIMER DEREQUITO PORRAS
  • Publication number: 20090206460
    Abstract: The invention provides apparatus and methods by which, in a stacked semiconductor chip package, a continuous electrical path may be provided among bond pads by way of one or more intermediate bond pad electrically isolated from its underlying surface.
    Type: Application
    Filed: October 30, 2007
    Publication date: August 20, 2009
    Inventors: Elaine Bautista Reyes, Erwin Remoblas Estepa, Edgardo Rulloda Hortaleza
  • Publication number: 20040232562
    Abstract: In accordance with the present invention, a system and method for increasing bump pad height in a flip chip assembly are provided. The method includes depositing a bump pad on a substrate and depositing a solder mask on the substrate to define an opening surrounding the bump pad. A resist material is then deposited on the substrate such that the resist material covers the bump pad and solder mask. The resist material is then etched to form a column-shaped opening above the bump pad, and a conductive material is deposited into the column-shaped opening. The remaining resist material may then be optionally removed, leaving behind a column of conductive material above the bump pad.
    Type: Application
    Filed: May 23, 2003
    Publication date: November 25, 2004
    Applicant: Texas Instruments Incorporated
    Inventors: Edgardo Rulloda Hortaleza, Glenn Enrick Calderon Cosue, Rodel Belarmino Arquisal