Patents by Inventor Edoardo Bonizzoni

Edoardo Bonizzoni has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12494798
    Abstract: A delta-sigma modulator includes a loop filter circuit having a first input that receives an input signal and a second input that receives a feedback signal. The loop filter circuit generates a filtered signal. A quantizer circuit quantizes the integrated signal to generate an output signal. An anti-windup circuit detects instances where the integrated signal is outside an input signal input of the quantizer circuit and in response thereto generates a dead zone signal having a magnitude and sign corresponding to a difference between the filtered signal and the input signal range. The feedback signal is a sum of the output signal and the dead zone signal.
    Type: Grant
    Filed: March 29, 2023
    Date of Patent: December 9, 2025
    Assignees: STMicroelectronics International N.V., Universita' Pavia, Politecnico Di Torino
    Inventors: Francesco Stilgenbauer, Edoardo Botti, Piero Malcovati, Paolo Stefano Crovetti, Edoardo Bonizzoni, Matteo De Ferrari
  • Patent number: 12407246
    Abstract: A control module, for a resonant switched-capacitor converter with an inductor, includes a controller stage, an input stage generating a control signal indicating a control quantity, a delay stage generating a duration signal indicating a time quantity, and a circuit indicating zero crossings of the inductor current. If the control quantity is variable, the input stage clamps the control quantity to a control threshold. When in normal mode, the controller stage controls the converter to carry out a phase sequence with timings that depend on the zero crossings and the time quantity, so the converter generates an output current that depends on the time quantity and is prevented from dropping below a minimum current. If the output voltage reaches an upper threshold, the controller stage switches into pulse-skipping mode to suspend the phase sequence, and resumes the phase sequence after the output voltage drops to a lower threshold.
    Type: Grant
    Filed: April 14, 2023
    Date of Patent: September 2, 2025
    Assignee: STMICROELECTRONICS S.R.L.
    Inventors: Alessandro Nicolosi, Alessandra Farina, Edoardo Bonizzoni
  • Patent number: 12405171
    Abstract: The described technology is generally directed towards an electrical current based temperature sensor and temperature information digitizer, referred to herein as a “temperature digitizer”. The temperature digitizer can include a sensor core, a digital to analog converter, a current comparator, and a processor. The processor can be configured to perform multiple current comparisons using the sensor core, digital to analog converter, and current comparator, and the processor can generate a digital code that reflects the results of the multiple current comparisons. The digital code represents the temperature.
    Type: Grant
    Filed: June 28, 2021
    Date of Patent: September 2, 2025
    Assignee: INVENSENSE, INC.
    Inventors: Daniele Gardino, Michele Folz, Antonio Aprile, Piero Malcovati, Raffaele Boi, Edoardo Bonizzoni
  • Patent number: 12368379
    Abstract: A control module, for a resonant switched-capacitor converter having first, second, third and fourth cascaded switches and generating an output voltage, includes a timing circuit generating a clock, a controller generating first and second control signals indicating, respectively, first and second control quantities, the difference between which being a function of the difference between a reference quantity and a feedback quantity depending on the output voltage, first and second delay circuits that generate first and second logic signals and, respectively, third and fourth logic signals, the first and third logic signals being delayed with respect to the clock as a function of, respectively, the first and second control quantities, the second and fourth control signals being respectively the logic negation of the first and third logic signals, and a driver that controls the first, second, third, and fourth switches based on, respectively, the first, second, third, and fourth logic signals.
    Type: Grant
    Filed: April 4, 2023
    Date of Patent: July 22, 2025
    Assignee: STMICROELECTRONICS S.R.L.
    Inventors: Alessandro Nicolosi, Alessandra Farina, Edoardo Bonizzoni
  • Publication number: 20240429881
    Abstract: Signal processing is applied to a digital input audio signal. An analog audio output signal is provided based on the digital input audio signal via a switching converter circuit driven by a PWM signal. The analog audio output signal is sensed to generate an analog feedback signal. The applied signal processing includes: producing a digital error signal indicative of a difference between the digital input audio signal and a digital word signal; applying digital-to-analog conversion to the digital error signal to produce an analog replica of the digital error signal; producing an analog difference signal indicative of a difference between the analog replica of the digital error signal and the analog feedback signal; applying analog-to-digital conversion to the analog difference signal to produce the digital word signal; applying digital filtering to the digital word signal to produce a filtered digital word signal that generates the PWM signal.
    Type: Application
    Filed: June 11, 2024
    Publication date: December 26, 2024
    Applicant: STMicroelectronics International N.V.
    Inventors: Edoardo BOTTI, Francesco STILGENBAUER, Matteo DE FERRARI, Edoardo BONIZZONI, Piero MALCOVATI
  • Publication number: 20240333302
    Abstract: A delta-sigma modulator includes a loop filter circuit having a first input that receives an input signal and a second input that receives a feedback signal. The loop filter circuit generates a filtered signal. A quantizer circuit quantizes the integrated signal to generate an output signal. An anti-windup circuit detects instances where the integrated signal is outside an input signal input of the quantizer circuit and in response thereto generates a dead zone signal having a magnitude and sign corresponding to a difference between the filtered signal and the input signal range. The feedback signal is a sum of the output signal and the dead zone signal.
    Type: Application
    Filed: March 29, 2023
    Publication date: October 3, 2024
    Applicants: STMicroelectronics International N.V., Universita' Pavia, Politecnico Di Torino
    Inventors: Francesco STILGENBAUER, Edoardo BOTTI, Piero MALCOVATI, Paolo Stefano CROVETTI, Edoardo BONIZZONI, Matteo DE FERRARI
  • Patent number: 12073860
    Abstract: According to an embodiment, a circuit includes a biasing and a low-frequency recovery circuit. The biasing circuit includes a voltage digital to analog converter (V-DAC), a differential difference amplifier coupled to the V-DAC, a common-mode feedback (CMFB) amplifier coupled to the differential difference amplifier, and a first pair of transistors arranged as a high-impedance structure and coupled to the differential difference amplifier and the CMFB amplifier. The low-frequency recovery circuit includes a current digital to analog converter (C-DAC), a second pair of transistors arranged as a high-impedance structure and coupled to the first pair of transistors, a pair of resistors having a resistance value equal to half a resistance of the resistive sensor, the pair of resistors arranged between the second pair of transistors and coupled to the C-DAC, and a gain circuit coupled to shared nodes between the second pair of transistors and the pair of resistors.
    Type: Grant
    Filed: March 28, 2023
    Date of Patent: August 27, 2024
    Assignee: STMicroelectronics S.r.l.
    Inventors: Dario Livornesi, Alessio Emanuele Vergani, Paolo Pulici, Francesco Piscitelli, Enrico Mammei, Mojtaba Mohammadi Abdevand, Piero Malcovati, Edoardo Bonizzoni
  • Publication number: 20240088844
    Abstract: Signal processing is applied to a digital audio input signal to provide an analog audio output signal using a switching converter circuit driven by a pulse-width-modulated (PWM) signal. The analog audio output signal is sensed to provide an analog feedback signal. The signal processing that is applied includes: converting the digital audio input signal to producing an analog replica; producing an analog error signal indicative of a difference between the analog replica of the digital input signal and the analog feedback signal; converting the analog error signal to produce a digital error signal; digitally filtering the digital error signal to produce a filtered digital error signal; and generating the PWM signal from the filtered digital error signal.
    Type: Application
    Filed: September 8, 2023
    Publication date: March 14, 2024
    Applicant: STMicroelectronics S.r.l.
    Inventors: Edoardo BOTTI, Francesco STILGENBAUER, Piero MALCOVATI, Edoardo BONIZZONI, Matteo DE FERRARI
  • Publication number: 20230386514
    Abstract: According to an embodiment, a circuit includes a biasing and a low-frequency recovery circuit. The biasing circuit includes a voltage digital to analog converter (V-DAC), a differential difference amplifier coupled to the V-DAC, a common-mode feedback (CMFB) amplifier coupled to the differential difference amplifier, and a first pair of transistors arranged as a high-impedance structure and coupled to the differential difference amplifier and the CMFB amplifier. The low-frequency recovery circuit includes a current digital to analog converter (C-DAC), a second pair of transistors arranged as a high-impedance structure and coupled to the first pair of transistors, a pair of resistors having a resistance value equal to half a resistance of the resistive sensor, the pair of resistors arranged between the second pair of transistors and coupled to the C-DAC, and a gain circuit coupled to shared nodes between the second pair of transistors and the pair of resistors.
    Type: Application
    Filed: March 28, 2023
    Publication date: November 30, 2023
    Inventors: Dario Livornesi, Alessio Emanuele Vergani, Paolo Pulici, Francesco Piscitelli, Enrico Mammei, Mojtaba Mohammadi Abdevand, Piero Malcovati, Edoardo Bonizzoni
  • Publication number: 20230353052
    Abstract: A control module, for a resonant switched-capacitor converter with an inductor, includes a controller stage, an input stage generating a control signal indicating a control quantity, a delay stage generating a duration signal indicating a time quantity, and a circuit indicating zero crossings of the inductor current. If the control quantity is variable, the input stage clamps the control quantity to a control threshold. When in normal mode, the controller stage controls the converter to carry out a phase sequence with timings that depend on the zero crossings and the time quantity, so the converter generates an output current that depends on the time quantity and is prevented from dropping below a minimum current. If the output voltage reaches an upper threshold, the controller stage switches into pulse-skipping mode to suspend the phase sequence, and resumes the phase sequence after the output voltage drops to a lower threshold.
    Type: Application
    Filed: April 14, 2023
    Publication date: November 2, 2023
    Inventors: Alessandro Nicolosi, Alessandra Farina, Edoardo Bonizzoni
  • Publication number: 20230327555
    Abstract: A control module, for a resonant switched-capacitor converter having first, second, third and fourth cascaded switches and generating an output voltage, includes a timing circuit generating a clock, a controller generating first and second control signals indicating, respectively, first and second control quantities, the difference between which being a function of the difference between a reference quantity and a feedback quantity depending on the output voltage, first and second delay circuits that generate first and second logic signals and, respectively, third and fourth logic signals, the first and third logic signals being delayed with respect to the clock as a function of, respectively, the first and second control quantities, the second and fourth control signals being respectively the logic negation of the first and third logic signals, and a driver that controls the first, second, third, and fourth switches based on, respectively, the first, second, third, and fourth logic signals.
    Type: Application
    Filed: April 4, 2023
    Publication date: October 12, 2023
    Inventors: Alessandro Nicolosi, Alessandra Farina, Edoardo Bonizzoni
  • Publication number: 20220412813
    Abstract: The described technology is generally directed towards an electrical current based temperature sensor and temperature information digitizer, referred to herein as a “temperature digitizer”. The temperature digitizer can include a sensor core, a digital to analog converter, a current comparator, and a processor. The processor can be configured to perform multiple current comparisons using the sensor core, digital to analog converter, and current comparator, and the processor can generate a digital code that reflects the results of the multiple current comparisons. The digital code represents the temperature.
    Type: Application
    Filed: June 28, 2021
    Publication date: December 29, 2022
    Inventors: Daniele Gardino, Michele Folz, Antonio Aprile, Piero Malcovati, Raffaele Boi, Edoardo Bonizzoni
  • Patent number: 10804796
    Abstract: A converter includes a first switch coupled between a first input terminal and a first terminal of an inductor, and a second switch coupled between a second terminal of the inductor and a second input terminal. A third switch is coupled between the second terminal of the inductor and a first output terminal, and a fourth switch is coupled between the first terminal of the inductor and a second output terminal. A capacitor is coupled between the first and second output terminals. A control circuit monitors a regulated voltage between the first and second output terminals. During a charge phase, the first and second switches are closed to charge the inductor. During a discharge phase, the third and fourth switches are closed to charge the capacitor and increase the regulated voltage.
    Type: Grant
    Filed: February 6, 2019
    Date of Patent: October 13, 2020
    Assignee: STMICROELECTRONICS S.R.L.
    Inventors: Edoardo Botti, Arunkumar Salimath, Edoardo Bonizzoni, Franco Maloberti, Paolo Cacciagrano, Davide Luigi Brambilla
  • Publication number: 20190245435
    Abstract: A converter includes a first switch coupled between a first input terminal and a first terminal of an inductor, and a second switch coupled between a second terminal of the inductor and a second input terminal. A third switch is coupled between the second terminal of the inductor and a first output terminal, and a fourth switch is coupled between the first terminal of the inductor and a second output terminal. A capacitor is coupled between the first and second output terminals. A control circuit monitors a regulated voltage between the first and second output terminals. During a charge phase, the first and second switches are closed to charge the inductor. During a discharge phase, the third and fourth switches are closed to charge the capacitor and increase the regulated voltage.
    Type: Application
    Filed: February 6, 2019
    Publication date: August 8, 2019
    Inventors: Edoardo Botti, Arunkumar Salimath, Edoardo Bonizzoni, Franco Maloberti, Paolo Cacciagrano, Davide Luigi Brambilla